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PDF 74LVC2G125DC Data sheet ( Hoja de datos )
| Número de pieza | 74LVC2G125DC | |
| Descripción | Dual bus buffer/line driver 3-state | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
74LVC2G125
Dual bus buffer/line driver; 3-state
Product specification
Supersedes data of 2004 Jan 09
2004 Sep 22
1 page  
Philips Semiconductors
Dual bus buffer/line driver; 3-state
Product specification
74LVC2G125
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
VI
VO
Tamb
tr, tf
PARAMETER
supply voltage
input voltage
output voltage
operating ambient temperature
input rise and fall times
CONDITIONS
VCC = 1.65 V to 5.5 V; enable
mode
VCC = 1.65 V to 5.5 V; disable
mode
VCC = 0 V; Power-down mode
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
MIN.
1.65
0
0
MAX.
5.5
5.5
VCC
UNIT
V
V
V
0 5.5 V
0 5.5 V
−40
+125
°C
0 20 ns/V
0 10 ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
VCC
IIK
VI
IOK
VO
PARAMETER
supply voltage
input diode current
input voltage
output diode current
output voltage
IO
ICC, IGND
Tstg
Ptot
output source or sink current
VCC or GND current
storage temperature
power dissipation
CONDITIONS
MIN.
VI < 0 V
note 1
−0.5
−
−0.5
VO > VCC or VO < 0 V
enable mode; notes 1 and 2
−
−0.5
disable mode; notes 1 and 2
−0.5
Power-down mode; notes 1 and 2 −0.5
VO = 0 V to VCC
−
−
Tamb = −40 °C to +125 °C
−65
−
MAX.
UNIT
+6.5 V
−50 mA
+6.5 V
±50
VCC + 0.5
+6.5
mA
V
V
+6.5
±50
±100
+150
300
V
mA
mA
°C
mW
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
2004 Sep 22
5
5 Page 
Philips Semiconductors
Dual bus buffer/line driver; 3-state
Product specification
74LVC2G125
VCC
PULSE
GENERATOR
VI
D.U.T.
VO
RT
VEXT
RL
CL RL
mna616
VCC
VI
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
VCC
VCC
2.7 V
2.7 V
VCC
CL
30 pF
30 pF
50 pF
50 pF
50 pF
RL
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
VEXT
tPLH/tPHL tPZH/tPHZ tPZL/tPLZ
open
open
GND
GND
2 × VCC
2 × VCC
open
GND
6V
open
GND
6V
open
GND
2 × VCC
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.6 Load circuitry for switching times.
2004 Sep 22
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet 74LVC2G125DC.PDF ] | |
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