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PDF 74LS393 Data sheet ( Hoja de datos )
| Número de pieza | 74LS393 | |
| Descripción | DUAL DECADE COUNTER; DUAL 4-STAGE BINARY COUNTER | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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DUAL DECADE COUNTER;
DUAL 4-STAGE
BINARY COUNTER
The SN54 / 74LS390 and SN54 / 74LS393 each contain a pair of high-speed
4-stage ripple counters. Each half of the LS390 is partitioned into a
divide-by-two section and a divide-by five section, with a separate clock input
for each section. The two sections can be connected to count in the 8.4.2.1
BCD code or they can count in a biquinary sequence to provide a square wave
(50% duty cycle) at the final output.
Each half of the LS393 operates as a Modulo-16 binary divider, with the last
three stages triggered in a ripple fashion. In both the LS390 and the LS393,
the flip-flops are triggered by a HIGH-to-LOW transition of their CP inputs.
Each half of each circuit type has a Master Reset input which responds to a
HIGH signal by forcing all four outputs to the LOW state.
• Dual Versions of LS290 and LS293
• LS390 has Separate Clocks Allowing ÷ 2, ÷ 2.5, ÷ 5
• Individual Asynchronous Clear for Each Counter
• Typical Max Count Frequency of 50 MHz
• Input Clamp Diodes Minimize High Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
SN54 / 74LS390
VCC CP0 MR Q0 CP1 Q1 Q2 Q3
16 15 14 13 12 11 10 9
1 2 3 4 56
CP0 MR Q0 CP1 Q1 Q2
78
Q3 GND
SN54 / 74LS393
VCC CP MR Q0 Q1 Q2 Q3
14 13 12 11 10 9
8
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
1234567
CP MR Q0 Q1 Q2 Q3 GND
SN54/74LS390
SN54/74LS393
DUAL DECADE COUNTER;
DUAL 4-STAGE
BINARY COUNTER
LOW POWER SCHOTTKY
16
1
16
1
16
1
14
1
14
1
14
1
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
D SUFFIX
SOIC
CASE 751B-03
J SUFFIX
CERAMIC
CASE 632-08
N SUFFIX
PLASTIC
CASE 646-06
D SUFFIX
SOIC
CASE 751A-02
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
FAST AND LS TTL DATA
5-544
1 page  
SN54/74LS390 • SN54/74LS393
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Symbol
tW
tW
tW
tW
trec
Parameter
Clock Pulse Width LS393
CP0 Pulse Width
CP1 Pulse Width
MR Pulse Width
LS390
LS390
LS390/393
Recovery Time
LS390/393
Min
20
20
40
20
25
Limits
Typ
Max
Unit
ns
ns
ns
ns
ns
Test Conditions
VCC = 5.0 V
AC WAVEFORMS
*CP 1.3 V
tPHL
Q 1.3 V
tW
Figure 1
1.3 V
tPLH
1.3 V
MR & MS
CP
Q
1.3 V
tPHL
1.3 V
tW trec
1.3 V
1.3 V
Figure 2
*The number of Clock Pulses required between tPHL and tPLH measurements can be determined from the appropriate Truth Table.
FAST AND LS TTL DATA
5-548
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet 74LS393.PDF ] | |
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