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Número de pieza | 74LCX541 | |
Descripción | Low Voltage Octal Buffer/Line Driver | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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74LCX541
Low Voltage Octal Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
Features
■ 5V tolerant input and outputs
■ 2.3V–3.6V VCC specifications provided
■ 6.5ns tPD max (VCC = 3.3V), 10µA ICC max
■ Power-down high impedance inputs and outputs
■ Supports live insertion/withdrawal(1)
■ ±24 mA output drive (VCC = 3.0V)
■ Implements proprietary noise/ EMI reduction circuitry
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance
– Human body model > 2000V
– Machine model > 200V
■ Leadless DQFN package
Note:
1. To ensure the high impedance state during power up
or down, OE should be tied to VCC through a pull-up
resistor: the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
General Description
The LCX541 is an octal buffer/line driver designed to be
employed as memory and address drivers, clock drivers
and bus oriented transmitter/receivers. The LCX541 is a
non inverting option of the LCX540.
This device is similar in function to the LCX244 while
providing flow-through architecture (inputs on opposite
side from outputs). This pinout arrangement makes this
device especially useful as an output port for micropro-
cessors, allowing ease of layout and greater PC board
density.
The LCX541 is designed for low voltage applications
with capability of interfacing to a 5V signal environment.
The LCX541 is fabricated with an advanced CMOS
technology to achieve high speed operation while
maintaining CMOS low power dissipation.
Ordering Information
Package
Order Number Number
Package Description
74LCX541WM
M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX541SJ
74LCX541BQX(2)
M20D
MLP20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
JEDEC MO-241, 2.5 x 4.5mm
74LCX541MSA
MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX541MTC
MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©2006 Fairchild Semiconductor Corporation
74LCX541 Rev. 1.6.1
www.fairchildsemi.com
1 page Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
VCC (V)
3.3
2.5
3.3
2.5
Conditions
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
TA = 25°C
Typical
0.8
0.6
–0.8
–0.6
Units
V
V
Capacitance
Symbol
Parameter
CIN
COUT
CPD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Conditions
VCC = Open, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC, f = 10 MHz
Typical
7
8
25
Units
pF
pF
pF
©2006 Fairchild Semiconductor Corporation
74LCX541 Rev. 1.6.1
5
www.fairchildsemi.com
5 Page Physical Dimensions (Continued)
Figure 5. 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2006 Fairchild Semiconductor Corporation
74LCX541 Rev. 1.6.1
11
www.fairchildsemi.com
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet 74LCX541.PDF ] |
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