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PDF 74HCT564 Data sheet ( Hoja de datos )
| Número de pieza | 74HCT564 | |
| Descripción | Octal D-type flip-flop; positive-edge trigger; 3-state; inverting | |
| Fabricantes | Philips | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT564
Octal D-type flip-flop; positive-edge
trigger; 3-state; inverting
Product specification
File under Integrated Circuits, IC06
December 1990
1 page  
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger;
3-state; inverting
Product specification
74HC/HCT564
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HC
+25
−40 to +85
−40 to +125
UNIT
VCC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
CP to Qn
50 165 205 250 ns
18 33 41 50
14 28 35 43
tPZH/ tPZL 3-state output enable 44 140 175 210 ns
time 16 28 35 42
OE to Qn
13 24 30 36
tPHZ/ tPLZ 3-state output disable 50 135 170 205 ns
time 18 27 34 41
OE to Qn
14 23 29 35
tTHL/ tTLH output transition time
14 60
75
90 ns
5 12 15 18
4 10 13 15
tW
clock pulse width
80 14
HIGH or LOW
16 5
14 4
100 120
20 24
17 20
ns
2.0 Fig.6
4.5
6.0
2.0 Fig.8
4.5
6.0
2.0 Fig.8
4.5
6.0
2.0 Fig.6
4.5
6.0
2.0 Fig.6
4.5
6.0
tsu set-up time
Dn to CP
60 6
12 2
10 2
75 90
15 18
13 15
ns 2.0 Fig.7
4.5
6.0
th hold time
Dn to CP
50 5 5
50 5 5
50 5 5
fmax maximum clock pulse 6.0 38
4.8 4.0
frequency
30 115
24
20
35 137
28
24
ns
MHz
2.0
4.5
6.0
2.0
4.5
6.0
Fig.7
Fig.6
December 1990
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet 74HCT564.PDF ] | |
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