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PDF UPD6134 Data sheet ( Hoja de datos )
| Número de pieza | UPD6134 | |
| Descripción | 4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION | |
| Fabricantes | NEC | |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD6133, 6134
4-BIT SINGLE-CHIP MICROCONTROLLER
FOR INFRARED REMOTE CONTROL TRANSMISSION
DESCRIPTION
Equipped with low-voltage 1.8V operation, a carrier generation circuit for infrared remote control transmission,
a standby release function through key entry, and a programmable timer, the µPD6133 and 6134 are suitable for
infrared remote control transmitters.
For the µPD6133 and 6134, we have made available the one-time PROM product µPD61P34B for program
evaluation or small-quantity production.
FEATURES
• Program memory (ROM)
· µPD6133: 512 × 10 bits
· µPD6134: 1002 × 10 bits
• Data memory (RAM): 32 × 4 bits
• Built-in carrier generation circuit for infrared remote control
• 9-bit programmable timer
: 1 channel
• Command execution time
: 8 µs (when operating at fX = 1 MHz: ceramic oscillation)
• Stack level
: 1 level (Stack RAM is for data memory RF as well.)
• I/O pins (KI/O)
: 8 units
• Input pins (KI)
: 4 units
• Sense input pin (S0)
: 1 unit
• S1/LED pin (I/O)
: 1 unit (When in output mode, this is the remore control transmission
display pin.)
• Power supply voltage
: VDD = 1.8 to 3.6 V (when operating at fX = 500 kHz)
VDD = 2.2 to 3.6 V (when operating at fX = 1 MHz)
• Operating ambient temperature : TA = –40 to +85 ˚C
• Oscillation frequency
: fX = 300 kHz to 1 MHz
• POC circuit (Mask option)
APPLICATION
Infrared remote control transmitter (for AV and household electric appliances)
Unless otherwise stated, the µPD6133 is taken as a representative product in this document.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. U10454EJ6V0DS00 (6th edition)
Date Published June 1999 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1995, 1999
1 page  
µPD6133, 6134
9. INSTRUCTION SET .................................................................................................................... 30
9.1 Machine Language Output by Assembler ....................................................................................... 30
9.2 Circuit Symbol Description .............................................................................................................. 31
9.3 Mnemonic to/from Machine Language (Assembler Output) Contrast Table ............................... 32
9.4 Accumulator Operation Instructions ............................................................................................... 36
9.5 Input/Output Instructions ................................................................................................................. 39
9.6 Data Transfer Instructions ................................................................................................................ 40
9.7 Branch Instructions .......................................................................................................................... 42
9.8 Subroutine Instructions .................................................................................................................... 43
9.9 Timer Operation Instructions ........................................................................................................... 44
9.10 Others ................................................................................................................................................. 45
10. ASSEMBLER RESERVED WORDS .......................................................................................... 47
10.1 Mask Option Directives ..................................................................................................................... 47
10.1.1 OPTION and ENDOP directives ............................................................................................. 47
10.1.2 Mask option definition directives ............................................................................................. 47
11. ELECTRICAL SPECIFICATIONS ............................................................................................... 48
12. CHARACTERISTIC CURVE (REFERENCE VALUES) .............................................................. 52
13. APPLIED CIRCUIT EXAMPLE ................................................................................................... 54
14. PACKAGE DRAWINGS .............................................................................................................. 55
15. RECOMMENDED SOLDERING CONDITIONS .......................................................................... 57
APPENDIX A. DEVELOPMENT TOOLS ......................................................................................... 58
APPENDIX B. FUNCTIONAL COMPARISON BETWEEN µPD6133 SUBSERIES AND
OTHER SUBSERIES ................................................................................................ 59
APPENDIX C. EXAMPLE OF REMOTE-CONTROL TRANSMISSION FORMAT (in the case
of NEC transmission format in command one-shot transmission mode) ......... 60
Data Sheet U10454EJ6V0DS00
5
5 Page 
µPD6133, 6134
Figure 2-4. Data Memory Organization
R1n (high-order 4 bits) R0n (low-order 4 bits)
R0
R10 R00
→DP (Refer to 2.6 Data Pointer.)
R1
R11 R01
R2
R12 R02
R3
R13 R03
R4
R14 R04
R5
R15 R05
R6
R16 R06
R7
R17 R07
R8
R18 R08
R9
R19 R09
RA
R1A R0A
RB
R1B R0B
RC
R1C
R0C
RD
R1D
R0D
RE
R1E R0E
RF
R1F R0F
→ASR (Refer to 2.3 Address Stack Register.)
2.6 Data Pointer (DP): 10 Bits
The ROM data table can be referenced by setting the ROM address in the data pointer to call the ROM contents.
The low-order 8 bits of the ROM address are specified by R0 of the data memory; and the high-order 2 bits by
bits 4 and 5 of the P3 register (CR0).
When reset, the pointer contents become “000H”.
Figure 2-5. Data Pointer Organization
P3 Register
b5 b4
P3 DP9 DP8
R10 R00
DP7 DP6 DP5 DP4 DP3 DP2 DP1 DP0 R0
2.7 Accumulator (A): 4 Bits
The accumulator, which refers to a register consisting of 4 bits, plays a leading role in performing various
operations.
When reset, the accumulator contents are left undefined.
Figure 2-6. Accumulator Organization
A3 A2 A1 A0 A
Data Sheet U10454EJ6V0DS00
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UPD6134.PDF ] | |
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