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PDF UPD4992GS Data sheet ( Hoja de datos )
| Número de pieza | UPD4992GS | |
| Descripción | 8-Bit Parallel I/O Calendar Clock | |
| Fabricantes | NEC | |
| Logotipo |  |
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PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
µPD4992
8-Bit Parallel I/O Calendar Clock
The µPD4992 is a CMOS integrated circuit which outputs 8-bit parallel time and calendar data in a system in which
a microprocessor is employed. The µPD4992 operates at 32.768 kHz and provides year, month, day of month, day
of week, hour, minute, and second data to a system. The µPD4992 internally contains a voltage regulator so that
low power consumption operation and high accuracy are realized even if the supply voltage varies. The µPD4992
uses the 8-bit bus to facilitate interfacing with a microprocessor.
FEATURES:
• Internal counter for time (hour, minute, second), and calendar (leap year, year, month, day of month, day of week)
• Super low power consumption (IDD = 2 µA MAX. at VDD = 2.4 V)
• Automatic determination of leap year, manual setting possible
• 12 hour/24 hour mode selectable
• 8-bit parallel input/output in BCD data format
• 12 kinds of interval timer output (can be used as watchdog timer)
• Internal voltage detection circuit for automatic determination of battery run-down
• High accuracy
ORDERING INFORMATION:
Order Code
µPD4992CX
µPD4992GS
µPD4992GS-T1, T2
µPD4992GS-E2
Package
20-pin plastic DIP (300 mil)
20-pin plastic SOP (300 mil)
20-pin plastic SOP (300 mil)
Provided on adhesive tape
20-pin plastic SOP (300 mil)
Provided on embossed carrier tape
Document No. ID-3084 (1st edition)
(O.D. No. ID-8222)
Date Published March 1997 P
Printed in Japan
The information in this document is subject to change without notice.
©
19925
1 page  
µPD4992
READ CYCLE (unless otherwise specified VDD = 5 V ± 10 %, Ta = –40 to +85 °C)
Item
Cycle time
Address access time
CS - access time
RD - output delay time
RD - output delay time
RD - output delay time
Output hold time
CS - output set time
CS - output floating time
Symbol
tRC
tAA
tACS
tOE
tOLZ
tOHZ
tOH
tCLZ
tCHZ
Condition
MIN.
150
5
15
10
5
TYP. MAX.
150
150
75
50
Unit
ns
READ CYCLE TIMING WAVEFORMS 1
CS
ADDRESS
RD
DOUT
tRC
tAA
tOE
tOLZ
READ CYCLE TIMING WAVEFORMS 2
ADDRESS
CS
RD
DOUT
tRC
tACS
tCLZ
tOH
Data output
tCHZ
tOHZ
Data output
5
5 Page 
(5) Use of INT reset, INT stop
INT
output
t1
T
(6) Use of TP enable
INT
output
INT INT
stop reset
Clear
INT stop
TT
TP TP
DISABLE ENABLE
µPD4992
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet UPD4992GS.PDF ] | |
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