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PDF UPD16337GF-3BA Data sheet ( Hoja de datos )
| Número de pieza | UPD16337GF-3BA | |
| Descripción | 64-BIT AC-PDP DRIVER | |
| Fabricantes | NEC | |
| Logotipo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD16337
64-BIT AC-PDP DRIVER
The µPD16337 is a high-voltage CMOS driver designed for flat display panels such as PDPs, VFDs and ELs. It
consists of a 64-bit bi-directional shift register (16 bit × 4 circuits), 64-bit latch and high-voltage CMOS driver. The
logic block is designed to operate at 5-V power supply, enabling direct connection to a microcontroller. In addition,
the µPD16337 achieves low power dissipation by employing CMOS structure while having a high withstand voltage
output (150 V, 40 mA MAX.)
FEATURES
• Built in four 16-bit bi-directional shift register circuits
• Data control with transfer clock (external) and latch
• High-speed data transfer (fmax. = 20 MHz MIN. at cascade connection)
• Wide operating temperature range (TA = –40 to +85°C)
• High withstand output voltage (150 V, 40 mA MAX.)
• 5-V CMOS input interface
• High withstand voltage CMOS structure
• Capable of reversing all driver outputs by PC pin
ORDERING INFORMATION
Part Number
µPD16337GF-3BA
Package
100-pin plastic QFP
Document No. S12363EJ1V0DS00 (1st edition)
Date Published January 1998 N CP(K)
Printed in Japan
© 1998
1 page  
µPD16337
TRUTH TABLE 1 (Shift Register Block)
Input
R/L CLK
H↓
H H or L
L↓
L H or L
Output
A
Input
B
OutputNote 1
OutputNote 2
Output
Input
Output
Shift Register
Right shift execution
Hold
Left shift execution
Hold
Notes 1. The data of S57, S58, S59, S60 shifts to S61, S62, S63, S64 and is output from B1, B2, B3, B4 at the falling
edge of the clock, respectively.
2. The data of S5, S6, S7, S8 shifts to S1, S2, S3, S4 and is output from A1, A2, A3, A4 at the falling edge of
the clock, respectively.
TRUTH TABLE 2 (Latch Block)
LE CLK
Output State of Latch Block (Ln)
H ↑ Latch Sn data and hold output data
↓ Hold latch data
L × Hold latch data
TRUTH TABLE 3 (Driver Block)
Ln BLK PC
× HH
×HL
×LH
×LL
×: H or L, H: High level, L: Low level
Output State of Driver Block
H (All driver outputs: H)
L (All driver outputs: L)
Output latch data (Ln)
Output reversed latch data (Ln)
5
5 Page 
µPD16337
PACKAGE DRAWINGS
100 PIN PLASTIC QFP (14 20)
A
B
80 51
81 50
detail of lead end
100
1
F
G
H IM
CD
S
Q
31
30
J
R
PK
M
NL
NOTE
Each lead centerline is located within 0.15 mm (0.006 inch) of
its true position (T.P.) at maximum material condition.
ITEM MILLIMETERS INCHES
A 23.2±0.2
0.913
+0.009
–0.008
B 20.0±0.2
0.787
+0.009
–0.008
C 14.0±0.2
0.551
+0.009
–0.008
D 17.2±0.2
F 0.8
G 0.6
0.677±0.008
0.031
0.024
H
0.30±0.10
0.012
+0.004
–0.005
I 0.15
0.006
J 0.65 (T.P.) 0.026 (T.P.)
K 1.6±0.2
0.063±0.008
L 0.8±0.2
0.031
+0.009
–0.008
M
0.15+–00..0150
0.006
+0.004
–0.003
N 0.10
0.004
P 2.7
0.106
Q 0.125±0.075 0.005±0.003
R 5°±5°
5°±5°
S 3.0 MAX. 0.119 MAX.
S100GF-65-3BA-3
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet UPD16337GF-3BA.PDF ] | |
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