UPC8129GR Datasheet PDF - NEC
Part Number | UPC8129GR | |
Description | Single Chip Transceiver Silicon MMIC for PHS | |
Manufacturers | NEC | |
Logo | ||
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BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC8129GR
UP CONVERTER WITH AGC FUNCTION + QUADRATURE MODULATOR IC
FOR DIGITAL MOBILE COMMUNICATION SYSTEMS
DESCRIPTION
The µPC8129GR is a silicon monolithic integrated circuit designed as indirect quadrature modulator for digital
mobile communication systems. This modulator consists of 0.8 GHz to 1.9 GHz up-converter and 100 MHz to 400
MHz quadrature modulator which are packaged in 20 pin SSOP. The device has power save function and can
operate 2.7 to 5.5 V supply voltage, therefore, it can contribute to make RF block small, high performance and low
power consumption.
FEATURES
• High linearity up converter is incorporated; PRFout = –5 dBm TYP./@fRFout = 900 MHz
• Wide operating frequency range. Up converter ; fRFout = 800 MHz to 1900 MHz
Modulator ; fLO1in = 200 MHz to 800 MHz
fMODout = 100 MHz to 400 MHz, fI/Q = DC to 10 MHz
• External IF filter can be applied between modulator output and up converter input terminal.
• Low phase difference due to digital phase shifter is adopted.
• Supply voltage: VCC = 2.7 to 5.5 V
• Equipped with power save function.
• 20 pin SSOP suitable for high density surface mounting.
APPLICATIONS
• Digital cellular phones (ex. GSM etc…)
• Digital cordless phones
ORDERING INFORMATION
PART NUMBER
µPC8129GR-E1
PACKAGE
20 pin plastic SSOP
(225 mil)
SUPPLYING FORM
Embossed tape 12 mm wide. QTY 2.5 kp/Reel.
Pins 1 through 10 are in pull-out direction.
* To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
µPC8129GR)
Caution electro-static sensitive device
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P12781EJ2V0DS00 (2nd edition)
Date Published October 1999 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1997, 1999
|
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µPC8129GR
ELECTRICAL CHARACTERISTICS (1)
Conditions (unless otherwise specified):
TA = +25 °C, VCC = 3 V, VPS = 3 V, RPS = 1 kΩ, VAGC = 3 V, RAGC = 10 kΩ
I/Q DC = 1.5 V (Vbias(I) = Vbias(Ib) = Vbias (Q) = Vbias (Qb) = 1.5 V)
fI/Qin = 67.7 kHz, VI/Qin = 500 mVP-P (single ended input, Ib = Qb = 0 mVP-P)
Modulation Pattern: <0000>
fLO1in = 500 MHz, PLO1in = –10 dBm
fLO2in = 1150 MHz, PLO2in = –10 dBm
fUPCONin = fMODout = fLO1in/2 + fI/Qin = 250 MHz + fI/Qin
fRFout = 900 MHz – fI/Qin
PARAMETER
SYMBOL
UP CONVERTER + QUADRATURE MODULATOR TOTAL
Total Circuit Current
ICC(TOTAL)
Total Circuit Current at Power Save
Mode
ICC(PS)TOTAL1
Total Output Power
PRFout
Local Oscillator Carrier Leakage
LoL
Image Rejection (Side Band Leak)
ImR
AGC Gain Control Rang
GCR
Power Save Rise Time
TPS(rise)
Power Save Fall Time
TPS(fall)
UP CONVERTER BLOCK
Circuit Current at Power Save Mode
ICC(PS)
(Up con.)
QUADRATURE MODULATOR BLOCK
Circuit Current at Power Save Mode
ICC(PS)
(MOD)
MIN.
20
–8
28
TYP.
28
0.6
–5
–40
–30
40
2.0
2.0
MAX. UNIT
TEST CONDITIONS
37 mA No input signal
10 µA VPS ≤ 0.5 V
–2
–26.5
–26.5
5.0
5.0
dBm
dBc
dBc
dB
µs
µs
fLoL = fLO2 – fLO1/2
VAGC = 2.5 V to 0 V
VPS(Low) → VPS(High)
VPS(High) → VPS(Low)
5.0 µA VPS ≤ 0.5 V
5.0 µA VPS ≤ 0.5 V
Data Sheet P12781EJ2V0DS00
5
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Information | Total 28 Pages | |
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