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PDF UPC8105GR Data sheet ( Hoja de datos )
| Número de pieza | UPC8105GR | |
| Descripción | 900 MHz BAND DIRECT QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATION SYSTEMS | |
| Fabricantes | NEC | |
| Logotipo |  |
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DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC8105GR
400 MHz QUADRATURE MODULATOR
FOR DIGITAL MOBILE COMMUNICATION
DESCRIPTION
The µPC8105GR is a sillicon monolithic integrated circuit designed as quadrature modulator for digital mobile
communication systems. This modulator housed in a 16 pin plastic SSOP that is easy to install and contributes to
miniaturizing the system.
The device has power save function and can operates 2.7 to 5.5 V supply voltage to realize low power
consumption.
FEATURES
• Internal 90° phase shifter is accurate over an IF range from 100 MHz to 400 MHz.
• Wide supply voltage range: VCC = 2.7 to 5.5 V.
• Low operation current: ICC = 16 mA (typ.).
• 16 pin plastic SSOP suitable for high density surface mounting.
• Low current in sleep mode
APPLICATION
• IF modulator for Digital cellular phone (PDC, IS-54, GSM etc..)
• IF modulator for Digital cordless phone (PHS, PCS etc..)
ORDERING INFORMATION
PART NUMBER
µPC8105GR-E1
PACKAGE
SUPPLYING FORM
16 pin plastic SSOP (225 mil) Carrier tape width 12 mm. Q’ty 2.5 kp/Reel
Pin 1 indicated pull-out direction of tape.
To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
µPC8105GR)
Caution electro-static sensitive device
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P10807EJ3V0DS00 (3rd edition)
Date Published October 1999 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1995, 1999
1 page  
µPC8105GR
PIN EXPLANATION
ASSIGN- SUPPLY PIN
PIN NO. MENT
VOL. (V) VOL.(V) FUNCTION AND APPLICATION
EQUIPMENT CIRCUIT
1 LOin −
0 LO input for phase shifter.
This input impedance is 50 Ω
matched internally.
1
50 Ω
2 LOin − 2.4 Bypass of LO input.
This pin is grounded through
internal capacitor.
Open in case of single ended.
3 GND 0
8
− Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
4
I
VCC/2
− Input for I signal. This in put
impedance is larger than 20 kΩ.
Relations between amplitude and
VCC/2 bias of input signal are
following.
VCC/2 (v)
≥ 1.35
≥ 1.5
≥ 1.75
Amp. (mVp-p) *1
400
600
1000
4
5
I
VCC/2
− Input for I signal. This in put
impedance is larger than 20 kΩ.
VCC/2 biased DC signal should be
input.
6
Q
VCC/2
− Input for Q signal. This in put
impedance is larger than 20 kΩ.
VCC/2 biased DC signal should be
input.
7
Q
VCC/2
− Input for Q signal. This in put
impedance is larger than 20 kΩ.
Relations between amplitude and
7
VCC/2 bias of input signal are
following.
VCC/2 (v)
≥ 1.35
≥ 1.5
≥ 1.75
Amp. (mVp-p) *1
400
600
1000
12 MODout
−
1.5 Output from modulator.
This is emitter follower output.
12
2
5
6
*1: In case of that I/Q input signals are single ended.
Of course, I/Q signal inputs can be used either single endedly or differentially with proper terminations.
Data Sheet P10807EJ3V0DS00
5
5 Page 
TEST CIRCUIT
VCC
µPC8105GR
fMOD out = 100 ~ 400 MHz
S.P.A
10 kΩ
1 000 pF
16 15 14 13 12 11 10 9
123
LO
Open
S.G
1 000 pF
fLO = 100 ~ 400 MHz
PIN = –10 dBm
4567
I I QQ
I/Q Signal Generator
8
f : DC to hundreds kHz
A : 0.5 Vp-p (I, Q only)
V : 1.5 V (I, I, Q, Q)
Data Sheet P10807EJ3V0DS00
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet UPC8105GR.PDF ] | |
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