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Número de pieza | UPC1851B | |
Descripción | I2C BUS-COMPATIBLE US MTS PROCESSING LSI | |
Fabricantes | NEC | |
Logotipo | ||
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No Preview Available ! DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC1851B
I2C BUS-COMPATIBLE US MTS PROCESSING LSI
The µPC1851B is an integrated circuit for US MTS (Multiplexed Television Sound) system with the addition of
the I2C bus interface. All functions required for US MTS system are incorporated on a single chip.
The µPC1851B allows users to switch modes, control volume and tone, and adjust the separation circuit
through the I2C bus.
FEATURES
• Stereo demodulation, SAP (Sub Audio Program) demodulation, dbx noise reduction decoding, I2C bus interface,
input selector (2 channels), surround processor (1 phase), volume and tone control circuits incorporated on a single
chip
• Mode switching, volume and tone control, and separation adjustment through the I2C bus
• Power supply: 8 V to 10 V
• On-chip input attenuator for simple interface with intermediate frequency processing IC (I2C bus control)
• Output level: 1.4 Vp-p (with L+R signals, 100 % modulation)
APPLICATION
• TV sets and VCRs for north America
ORDERING INFORMATION
Part Number
µPC1851BCU
Package
42-pin plastic SDIP (15.24 mm (600))
The µPC1851B is available only to licensees of THAT Corporation.
For information, please call: (508) 229-2500 (U.S.A), or (03) 5790-5391 (Tokyo).
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. S13417EJ2V0DS00 (2nd edition)
Date Published June 2000 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1998
1 page µPC1851B
dbx NOISE REDUCTION BLOCK
From Switch
LPF
fH Trap
408-Hz LPF
Variable
Emphasis
2.19-kHz LPF
Offset
Absorption
18
dO
2 fH Trap
Spectral RMS Filter
Wide-band RMS
Filter
D/A
Spectral
RMS
Timing Current
D/A
Wide-band
RMS
14 13
SRB STI
Wide-band VCA
Offset
Absorption
To Matrix Block
15 17 16
ITI WRB WTI
20
VOA
SELECTOR BLOCK
From Matrix Block
(L-channel signal)
From Matrix Block
(R-channel signal)
ER1 ER2
38 36
EL1 EL2
39 37
Switch Note1
Note2
40 kΩ 40 kΩ
40 kΩ
Note2 40 kΩ
–
+
To Surround Block
Switch (Monaural/Stereo)
To Surround Block
Notes 1. Switch (TV signal/External input 1/External input 2).
2. The input gain 0 dB/6 dB can be selected by the command of the I2C bus (refer to 4.3 (5) Input gain).
Data Sheet S13417EJ2V0DS00
5
5 Page Pin No.
Pin Name
9 Noise Detector Filter
Symbol
NDT
µPC1851B
Internal Equivalent Circuit
9
20 kΩ 20 kΩ
(3/9)
VCC
20 kΩ
10 SAP Single Output
20 kΩ 20 kΩ
SOT
20 kΩ 20 kΩ
2 kΩ
VCC
GND
200 Ω
10
2 kΩ
GND
Data Sheet S13417EJ2V0DS00
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet UPC1851B.PDF ] |
Número de pieza | Descripción | Fabricantes |
UPC1851B | I2C BUS-COMPATIBLE US MTS PROCESSING LSI | NEC |
UPC1851BCU | I2C BUS-COMPATIBLE US MTS PROCESSING LSI | NEC |
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