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What is UPB1005GS?

This electronic component, produced by the manufacturer "NEC", performs the same function as "REFERENCE FREQUENCY 16.368 MHz/ 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER".


UPB1005GS Datasheet PDF - NEC

Part Number UPB1005GS
Description REFERENCE FREQUENCY 16.368 MHz/ 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER
Manufacturers NEC 
Logo NEC Logo 


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DATA SHEET
BIPOLAR ANALOG + DIGITAL INTEGRATED CIRCUIT
µPB1005GS
REFERENCE FREQUENCY 16.368 MHz, 2ND IF FREQUENCY 4.092 MHz
RF/IF FREQUENCY DOWN-CONVERTER +
PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER
DESCRIPTION
The µPB1005GS is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double
conversion RF block integrated RF/IF down-converter + PLL frequency synthesizer on 1 chip.
The µPB1005GS features shrink package, fixed prescaler and supply voltage. The 30-pin plastic SSOP package
is suitable for high density surface mounting. The fixed division internal prescaler is needless to input serial counter
data. Supply voltage is 3 V. Thus, the µPB1005GS can make RF block fewer components and lower power
consumption.
This IC is manufactured using NEC’s 20 GHz fT NESATTMIII silicon bipolar process. This process uses direct
silicon nitride passivation film and gold electrodes. These materials can protect the chip surface from pollution and
prevent corrosion/migration. Thus, this IC realizes excellent performance, uniformity and reliability.
FEATURES
• Double conversion
: fREFin = 16.368 MHz, f2ndIFout = 4.092 MHz
• Integrated RF block
: RF/IF frequency down-converter + PLL frequency synthesizer
• High-density surface mountable : 30-pin plastic SSOP (9.85 × 6.1 × 2.0 mm)
• Needless to input counter data : fixed division internal prescaler
• VCO side division
: ÷ 200 (÷ 25, ÷ 8 serial prescaler)
• Reference division
: ÷2
• Supply voltage
: VCC = 2.7 to 3.3 V
• Low current consumption
: ICC = 45.0 mA TYP.@VCC = 3.0 V
• Gain adjustable externally
: Gain control voltage pin (control voltage up vs. gain down)
APPLICATION
• Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz
ORDERING INFORMATION
Part Number
µPB1005GS-E1
Package
Supplying Form
30-pin plastic SSOP
(7.62 mm (300))
Embossed tape 16 mm wide.
Pin 1 is in tape pull-out direction.
QTY 2.5 kpcs/reel.
Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample
order: µPB1005GS)
Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P13860EJ3V0DS00 (3rd edition)
Date Published April 2000 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1998, 2000

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UPB1005GS equivalent
µPB1005GS
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, TA = +25°C, VCC = 3.0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
Total Circuit Current
ICCtotal
ICC1 + ICC2 + ICC3 + ICC4
32.0 45.0
RF Down-converter Block (fRFin = 1575.42 MHz, f1stLOin = 1636.80 MHz, PLOin = 10 dBm, ZL = ZS = 50 )
Circuit Current 1
ICC1 No Signals
6.0 10.0
RF Conversion Gain
RF-SSB Noise Figure
CGRF
NFRF
PRFin = 40 dBm
PRFin = 40 dBm
12.5
7
15.5
10
Maximum IF Output Power
PO(sat)RF
PRFin = 10 dBm
5.5 2.5
IF Down-converter Block (f1stIFIn = 61.38 MHz, f2ndLOIn = 65.472 MHz, ZS = 50 , ZL = 2 k)
Circuit Current 2
ICC2 No Signals
3.4 5.3
IF Voltage Conversion Gain
CG(GV)IF at Maximum Gain, P1stIFin = 50 dBm
38
41
IF-SSB Noise Figure
NFIF
at Maximum Gain, P1stIFin = 50 dBm
8.5 11.5
Maximum 2nd IF Output
Power
PO(sat)IF
at Maximum Gain, P1stIFin = 20 dBm
9.5 6.5
Gain Control Voltage
VGC Voltage at Maximum Gain of CGIF

Gain Control Range
DGC
P1stIFin = 50 dBm
2nd IF Amplifier (f2ndIF = 4.092 MHz, ZS = 50 , ZL = 2 k)
20
Circuit Current 3
ICC3 No Signals
1.55 2.40
Voltage Gain
GV P2ndIFin = 60 dBm
37 40
Maximum Output Power
PO(sat)
P2ndIFin = 30 dBm
14.5 11.5
PLL Synthesizer Block
Circuit Current 4
ICC4 PLL All Block Operating
18.5 28.5
Phase Comparing
Frequency
fPD PLL Loop
8.0 8.184
Reference Input Minimum
Level
VREFin
ZL = 10 k//20 pF (Impedance of
measurement equipment)
200
Loop Filter Output Level (H)
VLP(H)
2.8
Loop Filter Output Level (L)
VLP(L)

Reference Output Swing
VREFout
ZL = 10 k//2 pF (Impedance of
measurement equipment)
1.0
MAX.
60.0
14.0
18.5
13
+0.5
7.2
44
14.5
3.5
1.0
3.25
43
8.5
38.5
8.4
0.4
Unit
mA
mA
dB
dB
dBm
mA
dB
dB
dBm
V
dB
mA
dB
dBm
mA
MHz
mVP-P
V
V
VP-P
Data Sheet P13860EJ3V0DS00
5


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Featured Datasheets

Part NumberDescriptionMFRS
UPB1005GSThe function is REFERENCE FREQUENCY 16.368 MHz/ 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER. NECNEC
UPB1005GSThe function is REFERENCE FREQUENCY 16.368 MHz/ 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER. NECNEC

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