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PDF UPA1850 Data sheet ( Hoja de datos )
| Número de pieza | UPA1850 | |
| Descripción | P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING | |
| Fabricantes | NEC | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1850
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
The µPA1850 is a switching device which can be
driven directly by a 2.5-V power source.
The µPA1850 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.
FEATURES
• Can be driven by a 2.5-V power source
• Low on-state resistance
RDS(on)1 = 115 mΩ MAX. (VGS = –4.5 V, ID = –1.5 A)
RDS(on)2 = 130 mΩ MAX. (VGS = –4.0 V, ID = –1.5 A)
RDS(on)3 = 200 mΩ MAX. (VGS = –2.5 V, ID = –1.5 A)
• Built-in G-S protection diode against ESD
ORDERING INFORMATION
PART NUMBER
PACKAGE
PACKAGE DRAWING (Unit : mm)
85
1 :Drain1
2, 3 :Source1
4 :Gate1
5 :Gate2
6, 7 :Source2
8 :Drain2
1.2 MAX.
1.0±0.05
0.25
14
3°
+5°
–3°
0.1±0.05
0.5
0.6
+0.15
–0.1
3.15 ±0.15
3.0 ±0.1
6.4 ±0.2
4.4 ±0.1
1.0 ±0.2
µPA1850GR-9JG
Power TSSOP8
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
0.65 0.8 MAX.
0.27
+0.03
–0.08
0.10 M
0.1
Drain to Source Voltage
Gate to Source Voltage
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
Channel Temperature
Storage Temperature
VDSS
VGSS
ID(DC)
ID(pulse)
PT
Tch
Tstg
–12
–10/+5
# 2.5
# 10
2.0
150
–55 to +150
V
V
A
A
W
°C
°C
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 %
2. Mounted on ceramic substrate of 5000 mm2 x 1.1 mm
EQUIVALENT CIRCUIT
Drain1
Drain2
Gate1
Body
Diode Gate2
Body
Diode
Gate
Protection Source1
Diode
Gate
Protection Source2
Diode
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D11818EJ2V0DS00 (2nd edition)
Date Published January 2000 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
©
1997, 2000
1 page  
µ PA1850
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
10
1
DYNAMIC INPUT CHARACTERISTICS
−5
ID = -2.5 A
−4 VDD = -4 V
VDD = -10 V
−3
−2
0.1
0.4
VGS = 0 V
0.8 1.2 1.6
VF(S-D) - Source to Drain Voltage - V
−1
0 0 3 6 9 12
QG - Gate Charge - nC
1000
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
15
100 62.5˚C/W
10
1
0.1
1m
10m
Mounted on Ceramic Substrate
of 5000 mm2 x 1.1 mm
Single Pulse
PD(FET1) : PD(FET2) = 1:1
100m
1
10
PW - Pulse Width - S
100 1000
Data Sheet D11818EJ2V0DS00
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet UPA1850.PDF ] | |
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