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What is U4280BM-BFL?

This electronic component, produced by the manufacturer "TEMIC Semiconductors", performs the same function as "AM / FM - PLL".


U4280BM-BFL Datasheet PDF - TEMIC Semiconductors

Part Number U4280BM-BFL
Description AM / FM - PLL
Manufacturers TEMIC Semiconductors 
Logo TEMIC Semiconductors Logo 


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AM / FM - PLL
U4280BM
Description
The U4280BM is an integrated circuit in BICMOS
technology for frequency synthesizer. It performs all the
functions of a PLL radio tuning system and is controlled
by I2C bus. The device is designed for all frequency
synthesizer applications of radio receivers, as well as
RDS (Radio Data System) applications.
Features
D Frequency range up to 150 MHz
D Pre-amplifier for AM and FM
yD Fine tuning steps: AM 1kHz
yFM 2 kHz
D Two programmable 16-bit divider,
adjustable from 2 to 65535
Ordering Information
Extended Type Number
U4280BM-B
U4280BM-BFL
D Reference oscillator up to 15 MHz
D 5 programmable switching outputs,
4 are open drain outputs up to 15 V
D Phase detector with separate outputs for AM and FM
D Controlled via I2C bus
Package
DIP20
SO20
Remarks
Block Diagram
OSCIN 18
19
OSCOUT
Oscillator
SCL
SDA
AS
2
3
4
I2C – BUS
interface
R – Divider
Latch
Shift register
Latch
12
AMOSC
Preamplifier
AM / FM–
switch
N – Divider
PRT SWO1 SWO2 SWO3 AM/FM
56789
Switching outputs
Latch
Status
Phase
detector
Current
sources
Analog
outputs
14
PDFM
15
PDAM
13
PDFMO
16
PDAMO
10
FMOSC
Preamplifier : 2
11
GND2
1
VDD
20
GND1
Figure 1. Block diagram
Lock
detector
17
LD
13346
TELEFUNKEN Semiconductors
Rev. A1, 10-Apr-97
Preliminary Information
1 (9)

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U4280BM-BFL equivalent
U4280BM
Electrical Characteristics
VDD = 5 V, Tamb = 25°C, otherwise specified
Parameters
Supply voltage range
Quiescent supply voltage
FM input sensitivity
AM input sensitivity
Oscillator input sensitivity
Adjustable divider 1)
Switching output, PRT
SWO1 to SWO3, AM/FM
(open drain outputs)
LD (open drain)
Phase detector
PDFM
PDAM
Analog output
I2bus inputs SCL, SDA
Output voltage
Clock frequency
Bus timing
Rise time SCL, SDA
Fall time SCL, SDA
“H” phase SCL
“L” phase SCL
Waiting time START
Set up time START
Set up time STOP
Set up time DATA
Hold time DATA
Test Conditions / Pins
Pin 1
Pin 1
RG = 50 W
Pin 10
fi = 30 to 60 MHz
fi = 70 to 120 MHz
fi = 120 to 130 MHz
WRG = 50 Pin 12
Wfi = 0.4 to 35 MHz
RG = 50
Pin 18
fi = 0.1 to 15 MHz
Pin 5
IH = 1 mA
IL = 1 mA
IL = 0.1 mA
Pins 6 to 9
IL = 1 mA
IL = 0.1 mA
Pin 17
IL = 1 mA
Output current 1
Output current 2
Pin 14
Output current 1
Output current 2
Pin 15
Pins 14 and 15 to VDD
Pins 14 and 15 to GND
H input voltage, Pins 2 and 3
L input voltage, Pins 2 and 3
ISDAH = 3 mA
Pin 2
Symbol
VDD
IDD
VI
Vi
Vi
Min.
4.5
50
25
50
Vi 25
Vi 100
2
VOH
VOL
VOL
VDD – 0.4
VOL
VOL
VOL
IO1
IO2
IO1
IO2
I13,16
I13,16
VIH
VIL
VO
fSCL
tr
tf
tH
tL
twSTA
thSTA
tsSTA
tsDAT
thDAT
±400
±100
±75
±20
0.1
3
0
0
4
4.7
4
4
4.7
250
0
1) FM input frequency is additionally divided by two (Pin 10).
Typ.
5.0
6.0
±500
±125
±100
±25
–1
0.5
Max.
5.5
11.6
65535
0.4
0.1
0.4
0.1
0.4
±600
±150
±100
±30
–2
VDD
1.5
0.4
110
1
300
Unit
V
mA
mV
mV
mV
mV
mV
V
V
V
V
V
V
mmAA
mmAA
mA
mA
V
V
V
kHz
ms
ns
ms
ms
ms
ms
ms
ns
ms
TELEFUNKEN Semiconductors
Rev. A1, 10-Apr-97
Preliminary Information
5 (9)


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Part Details

On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for U4280BM-BFL electronic component.


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Featured Datasheets

Part NumberDescriptionMFRS
U4280BM-BFLThe function is AM / FM - PLL. TEMIC SemiconductorsTEMIC Semiconductors

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