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PDF US3012ACW Data sheet ( Hoja de datos )

Número de pieza US3012ACW
Descripción 5 BIT PROGRAMMABLE SYNCHRONOUS BUCK CONTROLLER IC
Fabricantes UNISEM 
Logotipo UNISEM Logotipo



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No Preview Available ! US3012ACW Hoja de datos, Descripción, Manual

US3012/3012A
5 BIT PROGRAMMABLE SYNCHRONOUS BUCK
FEATURES
CONTROLLER IC
PRELIMINARY DATASHEET
DESCRIPTION
Dual Layout Compatible with RC5051
Designed to meet Intel specification of VRM8.2
& VRM8.3 for Pentium II
On board DAC programs the output voltage
from 1.3V to 3.5V (US3010) & 1.8V to 3.5V for
US3010A
Loss less Short Circuit Protection
Synchronous operation allows maximum
efficiency
Patented architecture allows fixed frequency
operation as well as 100% duty cycle during
dynamic load
Soft Start
High current totem pole driver for direct
driving of the external Power MOSFET
Power Good function
APPLICATIONS
Pentium II & Pentium Proprocessor DC to DC
converter application
Low cost Pentium with AGP
The US3012 family of controller ICs are specifically de-
signed to meet Intel specification for Pentium IIand
Pentium Promicroprocessor applications as well as
the next generation P6 family processors. These prod-
ucts feature a patented topology that in combination
with a few external components as shown in the typical
application circuit below ,will provide in excess of 16A
of output current for an on- board DC/DC converter while
automatically providing the right output voltage via the 5
bit internal DAC .These devices also feature, loss less
current sensing by using the Rds-on of the high side
Power MOSFET as the sensing resistor, a Power Good
window comparator that switches its open collector out-
put low when the output is outside of a ±10% window .
Other features of the device are ; Undervoltage lockout
for both 5V and 12V supplies as well as an external
programmable soft start function as well as program-
ming the oscillator frequency by using an external ca-
pacitor.
TYPICAL APPLICATION
5V
C1
L1
C5 R2
C3
Q1
R3
R4
R5
L2 R8
R7
C7
Q2
R6
R9
C11
C4 C6
12V
R1
C2
D1
13
V12
6
V5
7 NC/Vccp
16 SS/Vref
D4
8
D3
17
R10
4
CS+
D2
18
12 5
HDrv CS-
US3012
D1 D0
19 20
9
LDrv
10
Gnd
R11
14
Vfb/
GndD
En 2
NC/ NC/
GndP GndA
11 15
PGd 3
Ct
1
VID4
VID3
VID2
VID1
VID0
3012app1-1.1
C8
Notes: Pentium II and Pentium Pro are
trade marks of Intel Corp.
PACKAGE ORDER INFORMATION
R12
R13
OutEn
Power Good
C9 C10
Ta (°C)
0 TO 70
0 TO 70
Device
US3012CW
US3012ACW
Package
20 pin Plastic SOIC WB
20 pin Plastic SOIC WB
VID Voltage Range
1.3V to 3.5V
1.8V to 3.5V
Rev. 1.0
5/6/98
4-1

1 page




US3012ACW pdf
BLOCK DIAGRAM
US3012/3012A
En Enable
V12
UVLO
V5
Vset
D0 Enable
D1 5Bit
DAC,
D2 Ctrl
D3 Logic
D4
Vset
+
Slope
Comp
Enable
PWM
Control
Osc
V12
V12
Soft
Start &
Fault
Logic
Enable
Over
Current
200uA
1.1Vset
Vfb
HDrv
LDrv
CS-
CS+
Ct
SS
PGd
Gnd
0.9Vset
3012Ablk1-1.1
PGnd
Figure 1 - Simplified block diagram of the US3012/3012A.
Rev. 1.0
5/6/98
4-5

5 Page





US3012ACW arduino
US3012/3012A
Layout Considerations
Switching regulators require careful attention to the lay-
out of the components, specifically power components
since they switch large currents. These switching com-
ponents can create large amount of voltage spikes and
high frequency harmonics if some of the critical compo-
nents are far away from each other and are connected
with inductive traces. The following is a guideline of how
to place the critical components and the connections
between them in order to minimize the above issues.
Start the layout by first placing the power components:
c) Q2 drain to L2
d) L2 to the output capacitors, C10
e) C10 to the slot 1
f) Input filter L1 to the C3
Connect the rest of the components using the shortest
connection possible
1) Place the input capacitors C3 and the high side
mosfet ,Q1 as close to each other as possible
2) Place the synchronous mosfet,Q2 and the Q1 as
close to each other as possible with the intention that
the source of Q1 and drain of the Q2 has the shortest
length.
3) Place the snubber R4 & C7 between Q1 & Q2.
4) Place the output inductor ,L2 and the output capaci-
tors ,C10 between the mosfet and the load with output
capacitors distributed along the slot 1 and close to it.
5) Place the bypass capacitors, C4 and C6 right next to
12V and 5V pins. C4 next to the 12V, pin 13 and C6
next to the 5V, pin 6.
6) Place the IC such that the pwm output drives, pins
12 and 9 are relatively short distance from gates of Q1
and Q2.
7) If the ouput voltage is to be adjusted, place resistor
dividers, R10 & R11 close to the feedback pin.
Note 1: Although, the device does not require resistor
dividers and the feedback pin can be directly connected
to the output, they can be used to set the outputs slightly
higher to account for any output drop at the load due to
the trace resistance. See the application note.
8) Place timing capacitor C8 close to pin1 and soft start
capacitor C2 close to pin 16.
Component connections:
Note : It is extremely important that no data bus
should be passing through the switching regulator
section specifically close to the fast transition nodes
such as PWM drives or the inductor voltage.
Using 4 layer board, dedicate on layer to GND, another
layer as the power layer for the 5V, 3.3V and Vcore.
Connect all grounds to the ground plane using di-
rect vias to the ground plane.
Use large low inductance/low impedance plane to con-
nect the following connections either using component
side or the solder side.
a) C3 to Q1 Drain
b) Q1 Source to Q2 Drain
Rev. 1.0
5/6/98
4-11

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