UPI-42AH Datasheet PDF - Intel Corporation
| Part Number | UPI-42AH | |
| Description | UNIVERSAL PERIPHERAL INTERFACE 8-BIT SLAVE MICROCONTROLLER | |
| Manufacturers | Intel Corporation | |
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UPI-41AH 42AH
UNIVERSAL PERIPHERAL INTERFACE
8-BIT SLAVE MICROCONTROLLER
Y UPI-41 6 MHz UPI-42 12 5 MHz
Y Pin Software and Architecturally
Compatible with all UPI-41 and UPI-42
Products
Y 8-Bit CPU plus ROM OTP EPROM RAM
I O Timer Counter and Clock in a
Single Package
Y 2048 x 8 ROM OTP 256 x 8 RAM on
UPI-42 1024 x 8 ROM OTP 128 x 8
RAM on UPI-41 8-Bit Timer Counter 18
Programmable I O Pins
Y One 8-Bit Status and Two Data
Registers for Asynchronous Slave-to-
Master Interface
Y DMA Interrupt or Polled Operation
Supported
Y Fully Compatible with all Intel and Most
Other Microprocessor Families
Y Interchangeable ROM and OTP EPROM
Versions
Y Expandable I O
Y Sync Mode Available
Y Over 90 Instructions 70% Single Byte
Y Available in EXPRESS
Standard Temperature Range
Y inteligent Programming Algorithm
Fast OTP Programming
Y Available in 40-Lead Plastic and 44-
Lead Plastic Leaded Chip Carrier
Packages
(See Packaging Spec Order 240800-001)
Package Type P and N
The Intel UPI-41AH and UPI-42AH are general-purpose Universal Peripheral Interfaces that allow the designer
to develop customized solutions for peripheral device control
They are essentially ‘‘slave’’ microcontrollers or microcontrollers with a slave interface included on the chip
Interface registers are included to enable the UPI device to function as a slave peripheral controller in the MCS
Modules and iAPX family as well as other 8- 16- and 32-bit systems
To allow full user flexibility the program memory is available in ROM and One-Time Programmable EPROM
(OTP) All UPI-41AH and UPI-42AH devices are fully pin compatible for easy transition from prototype to
production level designs
210393 – 2
Figure 1 DIP Pin Configuration
November 1994
210393 – 3
Figure 2 PLCC Pin Configuration
Order Number 210393-008
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5 P26 and P27 are port pins or DMA handshake pins
for use with a DMA controller These pins default
to port pins on Reset
If the ‘‘EN DMA’’ instruction has been executed
P26 becomes the DRQ (DMA Request) pin A ‘‘1’’
written to P26 causes a DMA request (DRQ is acti-
vated) DRQ is deactivated by DACKRD
DACKWR or execution of the ‘‘EN DMA’’ in-
struction
If ‘‘EN DMA’’ has been executed P27 becomes
the DACK (DMA ACKnowledge) pin This pin acts
as a chip select input for the Data Bus Buffer reg-
isters during DMA transfers
UPI-41AH 42AH
210393 – 8
Figure 5 8088-UPI-41AH 42AH Interface
210393 – 7
DMA Handshake Capability
EN DMA Op Code 0E5H
1 110010 1
D7 D0
6 When EA is enabled on the UPI the program
counter is placed on Port 1 and the lower three
bits of Port 2 (MSB e P22 LSB e P10) On the
UPI this information is multiplexed with PORT
DATA (see port timing diagrams at end of this
data sheet)
7 The 8741AH and 8742AH support the inteligent
Programming Algorithm (See the Programming
Section )
210393 – 10
Figure 6 8048H-UPI-41 42 Interface
APPLICATIONS
210393 – 9
Figure 7 UPI-41 42-8243 Keyboard Scanner
Figure 4 UPI-41AH 42AH Keyboard Controller
210393 – 30
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for UPI-42AH electronic component. |
| Information | Total 20 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ UPI-42AH.PDF Datasheet ] | |
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