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PDF UPD78P4916 Data sheet ( Hoja de datos )
| Número de pieza | UPD78P4916 | |
| Descripción | 16-BIT SINGLE-CHIP MICROCONTROLLER | |
| Fabricantes | NEC | |
| Logotipo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD78P4916
16-BIT SINGLE-CHIP MICROCONTROLLER
The µPD78P4916 is one of the µPD784915 subseries in the 78K/IV Series microcontrollers which incorporate
a high-speed and high-performance 16-bit CPU.
The µPD78P4916 replaces mask ROM with one-time PROM and increases on-chip ROM and RAM capacity
compared to the µPD784915.
It is suitable for evaluation at system development and for small quantity production.
Detailed descriptions of functions are provided in the following user's manuals. Be sure to read these
documents when designing.
µPD784915 Subseries User’s Manual – Hardware : U10444E
78K/IV Series User's Manual – Instruction : U10905E
FEATURES
High-speed instruction execution using 16-bit CPU core
• Minimum instruction execution time: 250 ns (at 8-MHz internal clock)
On-chip high capacity memory
• PROM : 62 Kbytes Note
• RAM : 2048 bytes Note
Note It is possible to change the capacity of the internal PROM and the internal RAM by specifying the internal
memory capacity select (IMS) register.
ORDERING INFORMATION
Part Number
µPD78P4916GF-3BA
Package
100-pin plastic QFP (14 × 20 mm)
The information in this document is subject to change without notice.
Document No. U11045EJ1V0DS00 (1st edition)
Date Published April 1996 P
Printed in Japan
*The mark shows major revised points.
©
1996
1 page  
Pin Configuration (Top View)
(1) Normal Operation Mode
• 100-pin plastic QFP (14 × 20 mm)
µPD78P4916GF-3BA
µPD78P4916
P64
P65/HWIN
P66/PWM4
P67/PWM5
P60/STRB/CLO
P61/SCK1/BUZ
P62/SO1
P63/SI1
PWM0
PWM1
SCK2
SO2
SI2/BUSY
VDD
XT1
XT2
VSS
X2
X1
RESET
IC
PTO02
PTO01
PTO00
P87/PTO11
P86/PTO10
P85/PWM3
P84/PWM2
P83/ROTC
P82/HASW
10099 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
1 80
2 79
3 78
4 77
5 76
6 75
7 74
8 73
9 72
10 71
11 70
12 69
13 68
14 67
15 66
16 65
17 64
18 63
19 62
20 61
21 60
22 59
23 58
24 57
25 56
26 55
27 54
28 53
29 52
30 51
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
ANI9
ANI8
P77/ANI7
P76/ANI6
P75/ANI5
P74/ANI4
P73/ANI3
P72/ANI2
P71/ANI1
P70/ANI0
AVREF
AVDD2
P96
P95/KEY4
P94/KEY3
P93/KEY2
P92/KEY1
P91/KEY0
P90/ENV
NMI
INTP0
INTP1
INTP2
P00
P01
P02
P03
P04
P05
P06
Caution Connect the IC (Internally Connected) pin to VSS directly.
5
5 Page 
CONTENTS
µPD78P4916
1. DIFFERENCES BETWEEN µPD78P4916 AND µPD784915, µPD784916A ································· 12
2. PIN FUNCTION ································································································································· 13
2.1 Normal Operation Mode ····························································································································· 13
2.2 PROM Programming Mode (VPP ≥ 5 V, RESET = L) ·················································································· 15
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins ························································· 16
3. INTERNAL MEMORY CAPACITY SELECT REGISTER (IMS) ··················································· 20
*
4. PROM PROGRAMMING ··················································································································· 21
4.1 Operation Mode ·········································································································································· 21
4.2 PROM Write Procedure ······························································································································ 23
4.3 PROM Read Procedure ······························································································································ 27
4.4 Screening One-time PROM Versions ······································································································· 27
5. ELECTRICAL SPECIFICATIONS ····································································································· 28
6. PACKAGE DRAWING ······················································································································ 46
*
7. RECOMMENDED SOLDERING CONDITIONS ················································································· 47
APPENDIX A. DEVELOPMENT TOOLS ····························································································· 48
*
APPENDIX B. SOCKET DRAWING AND RECOMMENDED FOOTPRINT ········································ 50
APPENDIX C. RELATED DOCUMENTS ···························································································· 52
*
11
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