UPD75P0076GT Datasheet PDF - NEC
Part Number | UPD75P0076GT | |
Description | 4-BIT SINGLE-CHIP MICROCONTROLLER | |
Manufacturers | NEC | |
Logo | ||
There is a preview and UPD75P0076GT download ( pdf file ) link at the bottom of this page. Total 62 Pages |
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MOS INTEGRATED CIRCUIT
µPD75P0076
4-BIT SINGLE-CHIP MICROCONTROLLER
The µPD75P0076 replaces the µPD750068’s internal mask ROM with a one-time PROM and features expanded ROM
capacity.
Because the µPD75P0076 supports programming by users, it is suitable for use in prototype testing for system
development using the µPD750064, 750066, and 750068 products, and for use in small-lot production.
Detailed information about function is provided in the following user’s manual.
Be sure to read it before designing:
µPD750068 User’s Manual: U10670E
FEATURES
Compatible with µPD750068
Memory capacity:
• PROM : 16384 x 8 bits
• RAM : 512 x 4 bits
Can operate with same power supply voltage as the mask ROM version µPD750068
VDD = 1.8 to 5.5 V
On-chip A/D converter capable of low-voltage operation (AVREF = 1.8 to 5.5 V)
8-bit resolution x 8 channels
Small shrink SOP package
ORDERING INFORMATION
Part Number
µPD75P0076CU
µPD75P0076GT
Package
42-pin plastic shrink DIP (600 mil, 1.778-mm pitch)
42-pin plastic shrink SOP (375 mil, 0.8-mm pitch)
Caution On-chip pull-up resistors by mask option cannot be provided.
The information in this document is subject to change without notice.
Document No. U10232EJ1V0DS00 (1st edition)
Date Published December 1996 N
Printed in Japan
The mark shows major revised points.
©
1995
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2. BLOCK DIAGRAM
BASIC INTERVAL
TIMER/WATCHDOG
TIMER
INTBT
BUZ/P23
WATCH TIMER
TI0/P13
PTO0/P20
TI1/P12/INT2
PTO1/P21
SI/SB1/P03
SO/SB0/P02
SCK/P01
INTW INTW
INTT0
8-BIT
TIMER/
EVENT
CASCADED
COUNTER#0 16-BIT
TIMER/
8-BIT
TIMER/
EVENT
COUNTER
EVENT
COUNTER#1
INTT1
CLOCKED SERIAL
INTERFACE
INT0/P10
INT1/P11
INT4/P00
INT2/P12/TI1
KR0/P60 to
KR3/P63
4
INTCSI TOUT0
INTERRUPT
CONTROL
AN0/P110 to
AN3/P113
4
AN4/P60 to
AN7/P63
4
A/D CONVERTER
AVREF
AVSS
µPD75P0076
SP (8)
ALU CY
PROGRAM COUNTER
SBS
BANK
GENERAL REG.
PROGRAM
MEMORY
(PROM)
16384 x 8 BITS
DATA MEMORY
(RAM)
512 x 4BITS
PORT0 4 P00 to P03
PORT1 4 P10 to P13
PORT2 4 P20 to P23
PORT3
P30/MD0 to
4 P33/MD3
PORT4
4
P40/D0 to
P43/D3
PORT5
4
P50/D4 to
P53/D7
PORT6 4 P60 to P63
PORT11 4 P110 to P113
DECODE
AND
CONTROL
BIT SEQ. BUFFER (16)
fx/2N
CPU CLOCK Φ
CLOCK
OUTPUT
CONTROL
CLOCK
DIVIDER
SYSTEM CLOCK
GENERATOR
SUB MAIN
STAND BY
CONTROL
PCL/P22
XT1 XT2 X1 X2
VPP VDD VSS RESET
5
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Information | Total 62 Pages | |
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