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PDF UPD75116 Data sheet ( Hoja de datos )
| Número de pieza | UPD75116 | |
| Descripción | 4-Bit Single Chip-Microcomputer | |
| Fabricantes | NEC | |
| Logotipo |  |
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Data Sheet
µPD75112(A), 75116(A)
4-Bit Single Chip-Microcomputer
Description
The µPD75116(A) is one of the 4-bit single-chip micro-
computer 75X series.
The µPD75116(A) is a product with the extended ROM
capacity of the µPD75108(A). In addition of high-speed
operations, it can manipulate data in units of 1, 4 and 8
bits. In particular, the I/O operation of the µPD75116
have been improved by a wide variety of bit control
instructions. The µPD75116 is provided with interface
inputs/outputs with peripheral circuits having different
power voltages, and analog inputs and suitable for
controlling automobile electrical equipment, etc. For
the µPD75116(A), an on-chip pin-compatible one-time
PROM product (µPD75P116) is separately available for
system development evaluation.
Functions are described in detail in the following User’s
Manual, which should be read when carrying out
design work.
µPD751×× Series User’s Manual: IEM-992
Ordering Code
Package
Qualty Grade
µPD75112CW(A)-××× 64-pin plastic shrink DIP
(750 mil)
µPD75112GF(A)-×××-3BE 64-pin plastic QFP
(14 × 20 mm)
µPD75116CW(A)-××× 64-pin plastic shrink DIP
(750 mil)
µPD75116GF(A)-×××-3BE 64-pin plastic QFP
(14 × 20 mm)
Remarks: ××× is a ROM code number.
Special
Special
Special
Special
Please refer to "Quality Grade on NEC Semicon-
ductor Devices" (Document number IEI-1209) pub-
lished by NEC Corporation to know the specifica-
tion of quality grade on the devices and its recom-
mended applications.
Unless there are any particular functional differences,
the µPD75116(A) is described in this document as a
representative product.
Features
• Higher reliability than µPD75116
• Architecture "75X" equivalent to 8-bit microcomputer
• Minimum instruction execution time (high-speed
operation): 0.95 µs (when operated at 4.19 MHz and
5 V)
• Instruction execution variable function: 0.95µs/1.91µs/
15.3 µs (when operated at 4.19 MHz)
• Many input/output ports: 58
• 3-channel on-chip 8-bit timers
• 8-bit on-chip serial interface
• Multi-interruptible vector interrupt function
Applications
Automobile electrical equipment, etc.
Document No. IC-2811A
(O. D. No. IC-8261A)
Date Published March 1994 P
Printed in Japan
The information in this document is subject to change without notice.
5The mark shows major revised points.
©NEC Corporation 1990
1 page  
64-Pin Plastic QFP (14 × 20 mm)
µPD75112(A), 75116(A)
P41
P40
P53
P52
P51
P50
RESET
X2
X1
P63
P62
P61
P60
P73
P72
P71
P70
P83
P82
64 63 62 61 60 59 58 57 56 55 54 53 52
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20 21 22 23 24 25 26 27 28 29 30 31 32
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
P131
P132
P133
P120
P121
P122
P123
P00/INT4
P01/SCK
P02/SO
P03/SI
P20/PTO0
P21/PTO1
P22/PCL
P23
T11
T10
PTH00
PTH01
Pin Name 5
P00-P03
P10-P13
P20-P23
P30-P33
P40-P43
P50-P53
P60-P63
P70-P73
P80-P83
P90-P93
P120-P123
P130-P133
P140-P143
: Port0
: Port1
: Port2
: Port3
: Port4
: Port5
: Port6
: Port7
: Port8
: Port9
: Port12
: Port13
: Port14
SCK
SO
SI
PTO0, PTO1
PCL
PTH00-PTH03
INT0, INT1, INT4
INT2, INT3
TI0, TI1
X1, X2
RESET
NC
VDD
VSS
: Serial Clock
: Serial Output
: Serial Input
: Programmable Timer Output
: Programmable Clock
: Programmable Threshold Input
: External Vectored Interrupt Input
: External Test Input
: Timer Input
: Clock Oscillation
: Reset
: No Connection
: Positive Power Supply
: Ground
5
5 Page 
µPD75112(A), 75116(A)
4. Memory Configuration
• Program Memory (ROM)
12160 × 8 bits (0000H to 2F7FH): µPD75112(A)
16256 × 8 bits (0000H to 3F7FH): µPD75116(A)
• 0000H to 0001H: Vector table for writing the
program start address by reset
• 0002H to 000BH: Vector table for writing the
program start address by interrupt
Figure 4-1 Program Memory Map (µPD75112(A))
• 0020H to 007FH: Table area to be referred to
by the GETI instruction
• Data Memory
• Data area
512 × 4 bits (000H to 1FFH)
• Peripheral hardware area
128 × 4 bits (F80H to FFFH)
Address
76
0
0000H MBE RBE Internal Reset Start Address (High-Order 6 Bits)
Internal Reset Start Address (Low-Order 8 Bits)
0002H MBE RBE INTBT/INT4 Start Address (High-Order 6 Bits)
INTBT/INT4 Start Address (Low-Order 8 Bits)
0004H MBE RBE INT0/INT1 Start Address
(High-Order 6 Bits)
INT0/INT1 Start Address
(Low-Order 8 Bits)
0006H MBE RBE INTSIO Start Address
(High-Order 6 Bits)
INTSIO Start Address
0008H MBE RBE INTT0 Start Address
INTT0 Start Address
000AH MBE RBE INTT1 Start Address
(Low-Order 8 Bits)
(High-Order 6 Bits)
(Low-Order 8 Bits)
(High-Order 6 Bits)
CALLF
! faddr
Instruction
Entry
Address
INTT1 Start Address
(Low-Order 8 Bits)
≈
0020H
007FH
≈0080H
07FFH
≈0800H
0FFFH
1000H
≈
1FFFH
2000H
≈
2F7FH
GETI Instruction Reference Table
≈ BRCB
! caddr
Instruction
Branch
Address
≈
≈
≈ BRCB !caddr Instruction
Branch Address
≈ BRCB !caddr Instruction
Branch Address
CALL !addr
Instruction
Subroutin
Entry
Address
BR !addr
Instruction
Branch
Address
BR $addr
Instruction
Relative
Branch Address
(-15 to +16)
Branch Address
Subroutine Entry
Address by GETI
Instruction
Remarks: In all other cases, the program can be
branched by the BR PCDE and BR PCXA
instructions to an address with only the
lower 8 bits of PC changed.
11
11 Page | ||
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| PDF Descargar | [ Datasheet UPD75116.PDF ] | |
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