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PDF IPS511G Data sheet ( Hoja de datos )
| Número de pieza | IPS511G | |
| Descripción | FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH | |
| Fabricantes | International Rectifier | |
| Logotipo |  |
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Data Sheet No.PD60156-K
IPS511G/IPS512G
FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH
Features
• Over temperature protection (with auto-restart)
• Short-circuit protection (current limit)
• Active clamp
• E.S.D protection
• Status feedback
• Open load detection
• Logic ground isolated from power ground
Description
The IPS511G/IPS512G are fully protected five terminal
high side switches with built in short-circuit, over-tem-
perature, ESD protection, inductive load capability
and diagnostic feedback. The output current is con-
trolled when it reaches Ilim value. The current limitation
is activated until the thermal protection acts. The
over-temperature protection turns off the high side
switch if the junction temperature exceeds Tshutdown.
It will automatically restart after the junction has
cooled 7oC below Tshutdown. A diagnostic pin is
provided for status feedback of short-circuit, over-
temperature and open load detection. The double
level shifter circuitry allows large offsets between the
logic ground and the load ground.
Typical Connection
Product Summary
Rds(on)
V clamp
I Limit
V open load
150mΩ (max)
50V
5A
3V
Truth Table
Op. Conditions In Out
Normal
HH
Normal
LL
Open load
HH
Open load
LH
Over current
H L (limiting)
Over current
L
L
Over-temperature H L (cycling)
Over-temperature L
L
Available Package
Dg
H
L
H
H
L
L
L
L
+ 5v
15K
Status
feedback
Rdg
Dg
Rin
Logic
signal
In
+ VCC
Output pull-up resistor
Logic
control
Vcc
Out
Gnd
Load
Logic Gnd
Load Gnd
www.irf.com
8 Lead SOIC
(Single)
IPS511G
16 Lead SOIC
(Dual)
IPS512G
1
1 page  
IPS511G/IPS512G
Functional Block Diagram
All values are typical
VCC
IN
7V
DG
7V
62 V
Under voltage
lock out
Over
temperature
165°C
158°CTj
Charge
pump
50V
2.7 V
200 KΩ
2.2 V
Level
shift
driver
-
Current
limit
+
5A
40Ω
+
3V
-
Open load
GND
Short-circuit
+
-
3V
VOUT
Vin
T clamp
Iout
Out
( + Vcc )
0V
V clamp
( see Appl . Notes to evaluate power dissipation )
Figure 1 - Active clamp waveforms
Vin 5 V
0V
Iout
Ilim.
limiting
T
Tsd+
T(1s6d0- ° )
T shutdown
cycling
Figure 2 - Protection timing diagram
www.irf.com
5
5 Page 
Case Outline
IPS511G/IPS512G
16 Lead SOIC (narrow body)
01-3064 00
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd., Whyteleafe, Surrey CR3 0BL, United Kingdom
Tel: ++ 44 (0) 20 8645 8000
IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo, Japan 171-0021 Tel: 8133 983 0086
IR HONG KONG: Unit 308, #F, New East Ocean Centre, No. 9 Science Museum Road, Tsimshatsui East, Kowloon
Hong Kong Tel: (852) 2803-7380
Data and specifications subject to change without notice. 5/9/2000
www.irf.com
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet IPS511G.PDF ] | |
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