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7005 Datasheet PDF - Aeroflex Circuit Technology

Part Number 7005
Description ACT7005/7006 Single Package Solution Dual Transceiver/ Protocol/ Subsystem
Manufacturers Aeroflex Circuit Technology 
Logo Aeroflex Circuit Technology Logo 

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7005 datasheet, circuit
ACT7005/7006
Single Package Solution
Dual Transceiver, Protocol, Subsystem
Features
• Incorporates Transceivers, Protocol, and System Interface Components into a
Single Hybrid Package
• Functions as a Remote Terminal or Bus Controller
• Interfaces to µP as a Simple Peripheral Unit
• +5V Operation
CIRCUIT TECHNOLOGY
www.aeroflex.com
• Provides 2k by 16 of Double Buffered RAM Storage for Transmit and Receive
Subaddresses
• Pin Programmable for 8-bit or 16-bit Microprocessors
• Full Military (-55°C to +125°C) Temperature Range
General Description
The ACT7005/6 Series provides a complete one package interface between the MIL-STD-1553 bus and all
microprocessor systems. The hybrid provides all data buffers and control registers to function as a Bus
Controller or Remote Terminal. Control of the hybrid by the subsystem is through simple I/O port commands.
Internal hybrid logic removes all critical timing imposed on a typical subsystem, thereby simplifying the
implementation of this interface.
BUS "0"
DUAL
TX/RX
1553
PROTOCOL
BUS "1"
µP
INTERFACE
RAM
INTERRUPTS/
CONTROL
SIGNALS
S
U
B
S
Y
S
T
E
M
8/16
BIT
I/O
ACT7005 / ACT7006
Block Diagram
eroflex Circuit Technology – Data Bus Modules For The Future © SCD7005 REV B 8/2/01

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7005 equivalent
Symbol
Parameter
Min Typ Max Units
VDD
Logic Supply
4.5 5.0 5.5
VIH
Input "1"
2.4
VIL Input "0"
0.6
IL
Input I
-450 -600 -900
IIH
Input I
-250 -400 -750
IL
Input I
-50 -200 -800
IIH
Input I
-50 -200 -800
IL
Input I
-25 -125 -400
IIH
Input I
-25 -125 -400
VOH
Output "1"
2.4
VOL Output "0"
0.4
VDD Static I
50
VDD Dynamic I
170
Notes:
1. VDD = 5.5V
A. For RTAD0/1/2/3/4 and RTADPAR with VIL = 0.4V
B. For RTAD0/1/2/3/4 and RTADPAR with VIH = 2.4V
C. FOR BCSTEN WITH VIL = 0.4V, Test 1, 6MHz
D. FOR BCSTEN WITH VIH = 2.4V, Test 1, 6MHz
VDC
V
V
µA
µA
µA
µA
µA
µA
VDC
VDC
mA
mA
Conditions
Note 1A
Note 1B
Note 1C
Note 1D
Note 2A
Note 2B
Note 3A
Note 3B
Note 4A
Note 4B
2. All remaining inputs and I/O
VDD = 5.5V
A. VIL = 0.4V
B. VIH = 2.4V
3. A. VDD = 4.5V and IOH = 3mA
B. VDD = 5.5V and IOL = 3mA
4. VDD = 5.5V
A. Clock Input = 6MHz (45-55% Duty Cycle / TTL Levels), All remaining inputs = VDD,
All Outputs = Open Circuit
B. During a 32 word FIFO to RAM or RAM to FIFO block move.
Aeroflex Circuit Technology
Table 5 – Logic Electrical Characteristics
(Over Full Temperature Range)
5 SCD7005 REV B 8/2/01 Plainview NY (516) 694-6700

5 Page
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Information Total 29 Pages
Download[ 7005.PDF Datasheet ]

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