74ACT157SJ Datasheet PDF - Fairchild Semiconductor
Part Number | 74ACT157SJ | |
Description | Quad 2-Input Multiplexer | |
Manufacturers | Fairchild Semiconductor | |
Logo | ||
There is a preview and 74ACT157SJ download ( pdf file ) link at the bottom of this page. Total 9 Pages |
Preview 1 page No Preview Available ! November 1988
Revised November 1999
74AC157 • 74ACT157
Quad 2-Input Multiplexer
General Description
The AC/ACT157 is a high-speed quad 2-input multiplexer.
Four bits of data from two sources can be selected using
the common Select and Enable inputs. The four outputs
present the selected data in the true (noninverted) form.
The AC/ACT157 can also be used as a function generator.
Features
s ICC and IOZ reduced by 50%
s Outputs source/sink 24 mA
s ACT157 has TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC157SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
74AC157SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC157MTC
MTC16
16 -Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC157PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
74ACT157SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
74ACT157SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT157MTC
MTC16
16 -Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT157PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
I0a–I0d
I1a–I1d
E
S
Za–Zd
Description
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input
Select Input
Outputs
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS009929
www.fairchildsemi.com
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AC Electrical Characteristics for ACT
Symbol
Parameter
tPLH Propagation Delay
S to Zn
tPHL Propagation Delay
S to Zn
tPLH Propagation Delay
E to Zn
tPHL Propagation Delay
E to Zn
tPLH Propagation Delay
In to Zn
tPHL Propagation Delay
In to Zn
Note 8: Voltage Range 5.0 is 5.0V ± 0.5V
VCC
(V)
(Note 8)
5.0
5.0
5.0
5.0
5.0
5.0
Min
2.0
2.0
1.5
1.5
1.5
1.5
Capacitance
TA = +25°C
CL = 50 pF
Typ
5.5
5.5
6.0
5.0
4.0
4.5
Max
9.0
9.5
10.0
8.5
7.0
7.5
TA = −40°C to +85°C
CL = 50 pF
Min Max
1.5 10.0
2.0 10.5
1.5 11.5
1.0 9.0
1.0 8.5
1.0 8.5
Symbol
CIN
CPD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ Units
Conditions
4.5
50.0
pF VCC = OPEN
pF VCC = 5.0V
Units
ns
ns
ns
ns
ns
ns
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Information | Total 9 Pages | |
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