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PDF 74AC163 Data sheet ( Hoja de datos )

Número de pieza 74AC163
Descripción SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
Fabricantes STMicroelectronics　
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No Preview Available ! 74AC163 Hoja de datos, Descripción, Manual

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74AC163
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
s HIGH SPEED:
fMAX = 200MHz (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 8µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 163
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC163 is an advanced high-speed CMOS
SYNCRONOUS PRESETTABLE COUNTER
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS tecnology. It is a
4 bit binary counter with Synchronous Clear.
The circuit have four fundamental modes of
operation, in order of preference: synchronous
reset, parallel load, count-up and hold. Four
control inputs, Master Reset (CLEAR), Parallel
Enable Input (LOAD), Count Enable Input (PE)
and Count Enable Carry Input (TE), determine the
PIN CONNECTION AND IEC LOGIC SYMBOLS
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74AC163B
74AC163M
T&R
74AC163MTR
74AC163TTR
mode of operation as shown in the Truth Table. A
LOW signal on CLEAR overrides counting and
parallel loading and sets all outputs on LOW state
on the next rising edge of CLOCK. A LOW signal
on LOAD overrides counting and allows
information on Parallel Data inputs to be loaded
into the flip-flop on the next rising edge of CLOCK.
With LOAD and CLEAR HIGH, PE and TE permit
counting when both are HIGH. Conversely, a
LOW signal on either PE and TE inhibits counting.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
April 2001
1/13

1 page




74AC163 pdf
74AC163
DC SPECIFICATIONS
Test Condition
Value
Symbol
Parameter
VCC
(V)
TA = 25°C
Min. Typ. Max.
VIH High Level Input
Voltage
3.0
4.5
5.5
VO = 0.1 V or
VCC-0.1V
2.1 1.5
3.15 2.25
3.85 2.75
VIL Low Level Input
Voltage
3.0
4.5
5.5
VO = 0.1 V or
VCC-0.1V
1.5 0.9
2.25 1.35
2.75 1.65
VOH High Level Output 3.0
Voltage
4.5
IO=-50 µA
IO=-50 µA
2.9 2.99
4.4 4.49
5.5 IO=-50 µA 5.4 5.49
3.0
IO=-12 mA
2.56
4.5
IO=-24 mA
3.86
5.5
IO=-24 mA
4.86
VOL Low Level Output
Voltage
3.0
4.5
IO=50 µA
IO=50 µA
0.002 0.1
0.001 0.1
5.5 IO=50 µA
0.001 0.1
3.0 IO=12 mA
0.36
4.5 IO=24 mA
0.36
5.5 IO=24 mA
0.36
II Input Leakage
Current
5.5 VI = VCC or GND
± 0.1
ICC
Quiescent Supply
Current
5.5 VI = VCC or GND
8
IOLD
IOHD
Dynamic Output
Current (note 1, 2)
5.5 VOLD = 1.65 V max
VOHD = 3.85 V min
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
-40 to 85°C -55 to 125°C
Min. Max. Min. Max.
2.1 2.1
3.15
3.15
3.85
3.85
0.9 0.9
1.35
1.35
1.65
1.65
2.9 2.9
4.4 4.4
5.4 5.4
2.46
2.4
3.76
3.7
4.76
4.7
0.1 0.1
0.1 0.1
0.1 0.1
0.44
0.5
0.44
0.5
0.44
0.5
±1 ±1
80 160
75 50
-75 -50
Unit
V
V
V
V
µA
µA
mA
mA
5/13

5 Page





74AC163 arduino
DIM.
A
a1
a2
b
b1
C
c1
D
E
e
e3
F
G
L
M
S
74AC163
MIN.
0.1
0.35
0.19
9.8
5.8
3.8
4.6
0.5
SO-16 MECHANICAL DATA
mm
TYP.
0.5
1.27
8.89
MAX.
1.75
0.2
1.65
0.46
0.25
MIN.
0.004
0.013
0.007
45 (typ.)
10 0.385
6.2 0.228
4.0 0.149
5.3 0.181
1.27 0.019
0.62
8 (max.)
inch
TYP.
0.019
0.050
0.350
MAX.
0.068
0.007
0.064
0.018
0.010
0.393
0.244
0.157
0.208
0.050
0.024
P013H
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