74AHCT30D Datasheet PDF - NXP Semiconductors
Part Number | 74AHCT30D | |
Description | 8-input NAND gate | |
Manufacturers | NXP Semiconductors | |
Logo | ||
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DATA SHEET
74AHC30; 74AHCT30
8-input NAND gate
Product specification
File under Integrated Circuits, IC06
1999 Nov 30
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Philips Semiconductors
8-input NAND gate
Product specification
74AHC30; 74AHCT30
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VI
VO
Tamb
DC supply voltage
input voltage
output voltage
operating ambient
temperature
tr,tf (∆t/∆f) input rise and fall rates
CONDITIONS
74AHC
74AHCT
UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
2.0 5.0 5.5 4.5 5.0 5.5 V
0 − 5.5 0 − 5.5 V
0 − VCC 0 − VCC V
see DC and AC
−40 +25 +85 −40 +25 +85 °C
characteristics per device −40 +25 +125 −40 +25 +125 °C
VCC = 3.3 ±0.3 V
− − 100 − − − ns/V
VCC = 5 ±0.5 V
− − 20 − − 20
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
VCC DC supply voltage
VI input voltage
IIK DC input diode current
IOK DC output diode current
IO DC output source or sink current
ICC DC VCC or GND current
Tstg storage temperature
PD power dissipation per package
CONDITIONS
VI < −0.5 V; note 1
VO < −0.5 V or VO > VCC + 0.5 V; note 1
−0.5 V < VO < VCC + 0.5 V
for temperature range from
−40 to +125 °C; note 2
MIN.
−0.5
−0.5
−
−
−
−
−65
−
MAX.
+7.0
+7.0
−20
±20
±25
±75
+150
500
UNIT
V
V
mA
mA
mA
mA
°C
mW
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO-packages: above 70 °C the value of PD derates linearly with 8 mW/K.
For TSSOP-packages: above 60 °C the value of PD derates linearly with 5.5 mW/K.
1999 Nov 30
5
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 74AHCT30D electronic component. |
Information | Total 16 Pages | |
Link URL | [ Copy URL to Clipboard ] | |
Download | [ 74AHCT30D.PDF Datasheet ] |
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