74AHC14 Datasheet PDF - NXP Semiconductors
Part Number | 74AHC14 | |
Description | Hex inverting Schmitt trigger | |
Manufacturers | NXP Semiconductors | |
Logo | ||
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Preview 1 page No Preview Available ! 74AHC14; 74AHCT14
Hex inverting Schmitt trigger
Rev. 05 — 4 May 2009
Product data sheet
1. General description
The 74AHC14; 74AHCT14 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7A.
The 74AHC14; 74AHCT14 provides six inverting buffers with Schmitt-trigger action. They
are capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
2. Features
I Balanced propagation delays
I All inputs have Schmitt-trigger actions
I Inputs accept voltages higher than VCC
I Input levels:
N For 74AHC14: CMOS level
N For 74AHCT14: TTL level
I ESD protection:
N HBM EIA/JESD22-A114E exceeds 2000 V
N MM EIA/JESD22-A115-A exceeds 200 V
N CDM EIA/JESD22-C101C exceeds 1000 V
I Multiple package options
I Specified from −40 °C to +85 °C and from −40 °C to +125 °C
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NXP Semiconductors
74AHC14; 74AHCT14
Hex inverting Schmitt trigger
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74AHC14
VOH HIGH-level VI = VT+ or VT−
output voltage IO = −50 µA; VCC = 2.0 V
1.9 2.0
-
1.9
-
1.9
-V
IO = −50 µA; VCC = 3.0 V 2.9 3.0 -
2.9
-
2.9
-V
IO = −50 µA; VCC = 4.5 V 4.4 4.5 -
4.4
-
4.4
-V
IO = −4.0 mA; VCC = 3.0 V 2.58 -
- 2.48
-
2.40
-V
IO = −8.0 mA; VCC = 4.5 V 3.94 -
- 3.80
-
3.70
-V
VOL LOW-level
VI = VT+ or VT−
output voltage IO = 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V
IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V
II input leakage VI = 5.5 V or GND;
current
VCC = 0 V to 5.5 V
- - 0.1 - 1.0 - 2.0 µA
ICC supply current VI = VCC or GND; IO = 0 A; - - 2.0 - 20 - 40 µA
VCC = 5.5 V
CI input
capacitance
- 3 10
-
10
-
10 pF
CO output
capacitance
-4-
-
-
-
- pF
74AHCT14
VOH
VOL
II
ICC
∆ICC
CI
HIGH-level
VI = VT+ or VT−
output voltage IO = −50 µA; VCC = 4.5 V
4.4 4.5
-
4.4
IO = −8.0 mA; VCC = 4.5 V 3.94 -
- 3.80
LOW-level
VI = VT+ or VT−
output voltage IO = 50 µA; VCC = 4.5 V
- 0 0.1 -
IO = 8.0 mA; VCC = 4.5 V - - 0.36 -
input leakage VI = 5.5 V or GND;
current
VCC = 0 V to 5.5 V
- - 0.1 -
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
- - 2.0 -
additional
per input pin;
- - 1.35 -
supply current VI = VCC − 2.1 V; other pins
at VCC or GND; IO = 0 A;
VCC = 4.5 V to 5.5 V
input
capacitance
- 3 10
-
-
-
0.1
0.44
1.0
20
1.5
10
4.4
3.70
-
-
-
-
-
-
-V
-V
0.1 V
0.55 V
2.0 µA
40 µA
1.5 mA
10 pF
CO output
capacitance
-4-
-
-
-
- pF
74AHC_AHCT14_5
Product data sheet
Rev. 05 — 4 May 2009
© NXP B.V. 2009. All rights reserved.
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