M27128A-20F1 Datasheet PDF - STMicroelectronics
Part Number | M27128A-20F1 | |
Description | NMOS 128K 16K x 8 UV EPROM | |
Manufacturers | STMicroelectronics | |
Logo | ||
There is a preview and M27128A-20F1 download ( pdf file ) link at the bottom of this page. Total 10 Pages |
Preview 1 page No Preview Available ! M27128A
NMOS 128K (16K x 8) UV EPROM
FAST ACCESS TIME: 200ns
EXTENDED TEMPERATURE RANGE
SINGLE 5 V SUPPLY VOLTAGE
LOW STANDBY CURRENT: 40mA max
TTL COMPATIBLE DURING READ and
PROGRAM
FAST PROGRAMMING ALGORITHM
ELECTRONIC SIGNATURE
PROGRAMMING VOLTAGE: 12V
28
1
FDIP28W (F)
DESCRIPTION
The M27128A is a 131,072 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 16,384 words by 8 bits.
The M27128A is housed in a 28 Pin Window Ce-
ramic Frit-Seal Dual-in-Line package. The trans-
parent lid allows the user to expose the chip to
ultraviolet light to erase the bit pattern. A new
pattern can then be written to the device by follow-
ing the programming procedure.
Figure 1. Logic Diagram
VCC VPP
14
A0-A13
8
Q0-Q7
Table 1. Signal Names
A0 - A13
Q0 - Q7
E
G
P
VPP
VCC
VSS
Address Inputs
Data Outputs
Chip Enable
Output Enable
Program
Program Supply
Supply Voltage
Ground
P M27128A
E
G
VSS
AI00769B
March 1995
1/10
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M27128A
Table 6. Read Mode DC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol
Parameter
Test Condition
Min
ILI Input Leakage Current
0 ≤ VIN ≤ VCC
ILO Output Leakage Current
VOUT = VCC
ICC Supply Current
E = VIL, G = VIL
ICC1 Supply Current (Standby)
E = VIH
IPP Program Current
VPP = VCC
VIL Input Low Voltage
–0.1
VIH Input High Voltage
2
VOL Output Low Voltage
IOL = 2.1mA
=
VOH Output High Voltage
IOH = –400µA
2.4
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Max
±10
±10
75
35
5
0.8
VCC + 1
0.45
Unit
µA
µA
mA
mA
mA
V
V
V
V
Table 7. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol Alt
Parameter
Test
Condition
-2, -20
M27128A
blank, -25 -3, -30
Min Max Min Max Min Max
tAVQV
tACC
Address Valid to
Output Valid
E = VIL,
G = VIL
200 250 300
tELQV
tCE
Chip Enable Low to
Output Valid
G = VIL
200 250 300
tGLQV
tOE
Output Enable Low
to Output Valid
E = VIL
75 100 120
tEHQZ (2)
tDF
Chip Enable High to
Output Hi-Z
G = VIL
0
55
0
60
0 105
tGHQZ (2)
tDF
Output Enable High
to Output Hi-Z
E = VIL
0 55 0 60 0 105
tAXQX
tOH
Address Transition to
Output Transition
E = VIL,
G = VIL
0
0
0
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
-4
Min Max
450
450
150
0 130
0 130
0
Unit
ns
ns
ns
ns
ns
ns
5/10
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Information | Total 10 Pages | |
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