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What is 100352D?

This electronic component, produced by the manufacturer "National Semiconductor", performs the same function as "Low Power 8-Bit Buffer with Cut-Off Drivers".


100352D Datasheet PDF - National Semiconductor

Part Number 100352D
Description Low Power 8-Bit Buffer with Cut-Off Drivers
Manufacturers National Semiconductor 
Logo National Semiconductor Logo 


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August 1998
100352
Low Power 8-Bit Buffer with Cut-Off Drivers
General Description
The 100352 contains an 8-bit buffer, individual inputs (Dn),
outputs (Qn), and a data output enable pin (OEN). A Q out-
put follows its D input when the OEN pin is LOW. A HIGH on
OEN holds the outputs in a cut-off state. The cut-off state is
designed to be more negative than a normal ECL LOW level.
This allows the output emitter-followers to turn off when the
termination supply is −2.0V, presenting a high impedance to
the data bus. This high impedance reduces termination
power and prevents loss of low state noise margin when sev-
eral loads share the bus.
The 100352 outputs are designed to drive a doubly termi-
nated 50transmission line (25load impedance). All in-
puts have 50 kpull-down resistors.
Features
n Cut-off drivers
n Drives 25load
n Low power operation
n 2000V ESD protection
n Voltage compensated operating range = −4.2V to −5.7V
n Available to industrial grade temperature range
n Available to MIL-STD-883
Logic Symbol
Pin Names
D0– D7
OEN
Q0– Q7
NC
DS100296-1
Description
Data Inputs
Output Enable Input
Data Outputs
No Connect
© 1998 National Semiconductor Corporation DS100296
www.national.com

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100352D equivalent
AC Electrical Characteristics (Continued)
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
TC = −55˚C
Min Max
TC = +25˚C
Min Max
TC +125˚C Units
Min Max
Conditions
Notes
tTLH Transition Time
0.40 2.50 0.40 2.40 0.40 2.70 ns Figures 1, 2
(Note 10)
tTHL 20% to 80%, 80% to 20%
Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
Note 8: Screen tested 100% on each device at +25˚C temperature only, Subgroup A9.
Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11.
Note 10: Not tested at +25˚C, +125˚C, and −55˚C temperature (design characterization data).
Note 11: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
Test Circuitry
Notes:
VCC, VCCA = +2V, VEE = −2.5V
L1 and L2 = equal length 50impedance lines
RT = 50terminator internal to scope
Decoupling 0.1 µF from GND to VCC and VEE
All unused outputs are loaded with 25to GND
CL = Fixture and stray capacitance 3 pF
Switching Waveforms
FIGURE 1. AC Test Circuit
DS100296-6
DS100296-7
Note:
The output AC measurement point for cut-off propagation delay
testing = the 50% voltage point between active VOL and VOH.
FIGURE 2. Propagation Delay, Cut-Off and Transition Times
5 www.national.com


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