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PDF 100344D Data sheet ( Hoja de datos )
| Número de pieza | 100344D | |
| Descripción | Low Power 8-Bit Latch with Cut-Off Drivers | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 100344D (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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August 1998
100344
Low Power 8-Bit Latch with Cut-Off Drivers
General Description
The 100344 contains eight D-type latches, individual inputs
(Dn), outputs (Qn), a common enable pin (E), latch enable
(LE), and output enable pin (OEN). A Q output follows its D
input when both E and LE are LOW. When either E or LE (or
both) are HIGH, a latch stores the last valid data present on
its D input prior to E or LE going HIGH.
A HIGH on OEN holds the outputs in a cut-off state. The
cut-off state is designed to be more negative than a normal
ECL LOW level. This allows the output emitter-followers to
turn off when the termination supply is −2.0V, presenting a
high impedance to the data bus. This high impedance re-
duces termination power and prevents loss of low state
noise margin when several loads share the bus.
The 100344 outputs are designed to drive a doubly termi-
nated 50Ω transmission line (25Ω load impedance). All in-
puts have 50 kΩ pull-down resistors.
Features
n Cut-off drivers
n Drives 25Ω load
n Low power operation
n 2000V ESD protection
n Voltage compensated operating range = −4.2V to −5.7V
n Available to MIL-STD-883
Logic Symbol
Pin Names
D0– D7
E
LE
OEN
Q0– Q7
Description
Data Inputs
Enable Input
Latch Enable Input
Output Enable Input
Data Outputs
DS100317-4
Connection Diagrams
24-Pin DIP
24-Pin Quad Cerpak
DS100317-1
© 1998 National Semiconductor Corporation DS100317
DS100317-2
www.national.com
1 page  
Switching Waveforms
DS100317-7
FIGURE 2. Propagation Delay and Cutoff Times
DS100317-8
FIGURE 3. Setup, Hold and Pulse Width Times
DS100317-9
FIGURE 4. Propagation Delay LE, E to Q
5 www.national.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 100344D.PDF ] | |
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