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PDF 100343PC Data sheet ( Hoja de datos )

Número de pieza 100343PC
Descripción Low Power 8-Bit Latch
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! 100343PC Hoja de datos, Descripción, Manual

October 1989
Revised August 2000
100343
Low Power 8-Bit Latch
General Description
The 100343 contains eight D-type latches, individual
inputs, (Dn), outputs (Qn), a common enable pin (E), and a
latch enable pin (LE). A Q output follows its D input when
both E and LE are LOW. When either E or LE (or both) are
HIGH, a latch stores the last valid data present on its D
input prior to E or LE going HIGH.
The 100343 outputs are designed to drive a 50termina-
tion resistor to 2.0V. All inputs have 50 kpull-down
resistors.
Features
s Low power operation
s 2000V ESD protection
s Voltage compensated operating range = −4.2V to 5.7V
s Available to industrial grade temperature range
Ordering Code:
Order Number Package Number
Package Description
100343PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100343QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100343QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names
Description
D0D7
E
Data Inputs
Enable Input
LE Latch Enable Input
Q0Q7
NC
Data Inputs
No Connect
© 2000 Fairchild Semiconductor Corporation DS010250
28-Pin PLCC
www.fairchildsemi.com

1 page




100343PC pdf
Industrial Version
PLCC DC Electrical Characteristics (Note 8)
VEE = −4.2V to 5.7V, VCC = VCCA = GND, TC = −40°C to +85°C
Symbol
Parameter
TC = −40°C
Min Max
TC = 0°C to +85°C
Min Max
Units
Conditions
VOH
VOL
VOHC
VOLC
VIH
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
1085
1830
1095
1170
870
1575
1565
870
1025
1830
1035
1165
870
1620
1610
870
mV VIN = VIH (Max)
Loading with
mV or VIL (Min)
50to 2.0V
mV VIN = VIH (Min)
Loading with
mV or VIL (Max)
50to 2.0V
mV Guaranteed HIGH Signal
for All Inputs
VIL Input LOW Voltage
1830 1480 1830 1475
mV Guaranteed LOW Signal
for All Inputs
IIL Input LOW Current
0.50
0.50
µA VIN = VIL (Min)
IIH Input HIGH Current
240 240 µA VIN = VIH (Max)
IEE Power Supply Current
Inputs Open
95 50 95 55 mA VEE = −4.2V to 4.8V
97 50 97 55
VEE = −4.2V to 5.7V
Note 8: The specified limits represent the worst casevalue for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under worst caseconditions.
PLCC AC Electrical Characteristics
VEE = −4.2V to 5.7V, VCC = VCCA = GND
Symbol
Parameter
tPLH Propagation Delay
tPHL Dn to Output
tPLH Propagation Delay
tPHL LE, E to Output
tTLH Transition Time
tTHL 20% to 80%, 80% to 20%
ts Setup Time
D0D7
tH Hold Time
D0D7
TC = −40°C
Min Max
0.80
1.80
1.40
2.70
0.40
0.60
0.8
2.50
TC = +25°C
Min Max
0.80 1.80
1.40 2.70
0.45 1.90
0.90
0.0
TC = +85°C
Min Max
0.80
2.00
1.60
2.90
0.45
1.00
0.0
1.90
Units
Conditions
Figures 1, 2, 3
ns
(Note 9)
Figures 1, 2, 3
ns
(Note 9)
ns Figures 1, 3
ns Figures 1, 4
ns Figures 1, 4
tpw(H)
Pulse Width HIGH
LE, E
2.40
2.00
2.00
ns Figures 1, 4
Note 9: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
5 www.fairchildsemi.com

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