100325QC Datasheet PDF - Fairchild Semiconductor
Part Number | 100325QC | |
Description | Low Power Hex ECL-to-TTL Translator | |
Manufacturers | Fairchild Semiconductor | |
Logo | ||
There is a preview and 100325QC download ( pdf file ) link at the bottom of this page. Total 9 Pages |
Preview 1 page No Preview Available ! July 1988
Revised August 2000
100325
Low Power Hex ECL-to-TTL Translator
General Description
The 100325 is a hex translator for converting F100K logic
levels to TTL logic levels. Differential inputs allow each cir-
cuit to be used as an inverting, non-inverting or differential
receiver. An internal reference voltage generator provides
VBB for single-ended operation, or for use in Schmitt trigger
applications. All inputs have 50kΩ pull-down resistors.
When the inputs are either unconnected or at the same
potential the outputs will go LOW.
When used in single-ended operation the apparent input
threshold of the true inputs is 20mV to 40mV higher (posi-
tive) than the threshold of the complementary inputs. The
VEE and VTTL power may be applied in either order.
Features
s Pin/function compatible with 100125
s Meets 100125 AC specifications
s 50% power reduction of the 100125
s Differential inputs with built in offset
s Standard FAST outputs
s 2000V ESD protection
s −4.2V to −5.7V operating range
s Available to industrial grade temperature range
Ordering Code:
Order Number Package Number
Package Description
100325SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
100325PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100325QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100325QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
24-Pin DIP/SOIC
28-Pin PLCC
Pin Descriptions
Pin Names
D0–D5
D0–D5
Q0–Q5
Description
Data Inputs
Inverting Data Inputs
Data Outputs
FAST is a registered trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation DS009879
www.fairchildsemi.com
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Industrial Version
PLCC DC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = GND, TC = −40°C to +85°C (Note 6)
Symbol
Parameter
TC = −40°C
Min Max
TC = 0°C to +85°C
Min Max
Units
Conditions
VBB
Output Reference Voltage
−1395 −1255 −1380 −1260
mV IVBB = −2.1 mA
VIH Single-Ended Input
HIGH Voltage
−1170
−870
−1165
−870
Guaranteed HIGH Signal for All Inputs
mV
(with One Input Tied to VBB)
VIL Single-Ended Input
LOW Voltage
−1830 −1480 −1830 −1475
Guaranteed LOW Signal for All Inputs
mV
(with One Input Tied to VBB)
VOH Output HIGH Voltage
2.5
2.5
V IOH = −2.0 mA
VIN = VIH (Max)
VOL Output LOW Voltage
0.5
0.5 V IOL = 20 mA
or VIL (Min)
VDIFF
Input Voltage Differential
150
150
mV Required for Full Output Swing
VCM Common Mode Voltage
VCC − 2.0 VCC − 0.5 VCC − 2.0 VCC − 0.5
V
IIH Input HIGH Current
450 350 µA VIN = VIH (Max), D0–D5 = VBB,
D0–D5 = VIL (Min)
IIL Input LOW Current
0.5
0.5
µA VIN = VIL (Min), D0–D5 = VBB
IOS
Output Short-Circuit Current
−150 −60 −150 −60
mA VOUT = GND (Note 7)
IEE VEE Power Supply Current −37 −15 −37 −17 mA D0–D5 = VBB
ITTL VTTL Power Supply Current
65 65 mA D0–D5 = VBB
Note 6: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under “worst case” conditions.
Note 7: Test one output at a time.
PLCC AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = GND, VTTL = +4.5V to +5.5V
Symbol
Parameter
TC = −40°C
Min Max
tPLH Propagation Delay
tPHL Data to Output
tPLH Propagation Delay
tPHL Data to Output
0.80
1.60
3.30
4.10
TC = +25°C
Min Max
0.90
3.50
1.70
4.30
TC = +85°C
Min Max
1.00
3.80
1.80
4.60
Units
Conditions
ns CL = 15 pF
Figures 1, 2
ns CL = 50 pF
Figures 1, 3
Switching Waveform
FIGURE 1. Propagation Delay
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