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PDF AP2003S Data sheet ( Hoja de datos )

Número de pieza AP2003S
Descripción Synchronous PWM Controller
Fabricantes ETC 
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Synchronous PWM Controller
AP2003
(Preliminary)
„ Features
- Single or Dual Supply Application
- 0.8V + 1.0% Voltage Reference.
- Fast transient response.
- Synchronous operation for high efficiency (95%)
- Soft Start functions
- Small size with minimum external components
- Industrial temperature range
- Under Voltage Lockout function
- SOP-8L package
„ Applications
- Microprocessor core supply
- Low cost synchronous applications
- Voltage Regulator Modules (VRM)
- DDR termination supplies
- Networking power supplies
- Sequenced power supplies
„ General Description
The AP2003 is a low-cost, full featured, and
synchronous voltage-mode controller designed for
use in single ended power supply applications
where efficiency is of the primary concern. This
synchronous operation allows the elimination of
heat sinks in many applications. The AP2003 is
ideal for implementing DC/DC converters needed to
power advanced microprocessors in low cost
systems, or in distributed power applications where
efficiency is important. Internal level-shift,
high-side drive circuitry, and preset shoot-thru
control, allows the use of inexpensive N-channel
power switches.
AP2003 features include temperature compensated
voltage reference, an internal 200KHz virtual
frequency oscillator, under-voltage lockout
protection, soft-start, and shutdown function.
„ Pin Assignment
„ Pin Descriptions
(Top View)
SS/SHDN 1
8 COMP
VCC
DRVH
2
3
AP2003
7
6
SENSE
BSTH
GND 4
5 DRVL
SOP-8L
„ Ordering Information
AP2003 X X X
Package
Lead Free
Packing
S: SOP-8L Blank : Normal
Blank : Tube
L : Lead Free Package A : Taping
Name
Description
VCC Chip supply voltage
DRVH High side driver output
DRVL Low side driver output
BSTH Bootstrap, high side driver
SENSE Voltage sense input
COMP
SS/ SHDN
GND
Compensation pin
Soft start, a capacitor to ground sets
the slow start time
Ground
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev. 0.1 Feb.10, 2004
1/6

1 page




AP2003S pdf
Synchronous PWM Controller
AP2003
(Preliminary)
„ Function Description
Synchronous Buck Converter
Primary VCORE power is provided by a synchronous,
voltage-mode pulse width modulated (PWM)
controller. This section has all the features required
to build a high efficiency synchronous buck
converter, shutdown function.
The output voltage of the synchronous converter is
set and controlled by the output of the error
amplifier. The external resistive divider reference
voltage is derived from an internal trimmed
band-gap voltage reference. The inverting input of
the error amplifier receives its voltage from the
SENSE pin.
The internal oscillator uses an on-chip capacitor
and trimmed precision current sources to set the
oscillation frequency to 200KHz. The triangular
output of the oscillator sets the reference voltage at
the inverting input of the comparator. When the
oscillator output voltage drops below the error
amplifier output voltage, the comparator output
goes high. This pulls DRVL low, turning off the
low-side FET, and DRVH is pulled high, turning on
the high-side FET (once the cross-current control
allows it). When the oscillator voltage rises back
above the error amplifier output voltage, the
comparator output goes low. This pulls DRVH low,
turning off the high-side FET, and DRVL is pulled
high, turning on the low-side FET (once the
cross-current control allows it).
As SENSE increases, the output voltage of the
error amplifier decreases. This causes a reduction
in the on-time of the high-side MOSFET connected
to DRVH, hence lowering the output voltage.
Under Voltage Lockout
The under voltage lockout circuit of the AP2003
assures that the high-side MOSFET driver outputs
remain in the off state whenever the supply voltage
drops below set parameters. Lockout occurs if VCC
falls below 4.1V. Normal operation resumes once
VCC rises above 4.2V.
Soft Start
Initially, SS/ SHDN sources 10uA of current to
charge an external capacitor. The outputs of the
error amplifiers are clamped to a voltage
proportional to the voltage on SS/ SHDN . This
limits the on-time of the high-side MOSFETs, thus
leading to a controlled ramp-up of the output
voltages.
Hiccup Mode
During power up, the SS/ SHDN pin is internally
pulled low until VCC reaches the under-voltage
lockout level of 4.2V. Once VCC has reached 4.2V,
the SS/ SHDN pin is released and begins to source
10uA of current to the external soft-start capacitor.
As the soft-start voltage rises, the output of the
internal error amplifier is clamped to this voltage.
When the error signal reaches the level of the
internal triangular oscillator, which swings from 1V
to 2V at a fixed frequency of 200KHz, switching
occurs. As the error signal crosses over the
oscillator signal, the duty cycle of the PWM signal
continues to increase until the output comes into
regulation.
The soft-start voltage will begin to decrease as the
2uA of current discharge the external capacitor.
When the soft-start voltage reaches 0.8V, the
SS/ SHDN pin will begin to source 10uA and begin
to charge the external capacitor causing the
soft-start voltage to rise again. Again, when the
soft-start voltage reaches the level of the internal
oscillator, switching will occur.
In conclusion, above is shown a typical “12V
Application Circuit” which has a BSTH voltage
derived by bootstrapping input voltage to the
PHASE node through diode D2. This circuit is very
useful in cases where only single input power of
5V(or 12V) is available.
In order to prevent substrate glitching, a
small-signal diode should be placed in close
proximity to the chip with cathode connected to
PHASE and anode connected to GND.
Anachip Corp.
www.anachip.com.tw
Rev. 0.1 Feb.10, 2004
5/6

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