|
|
PDF AD484M1644VTA-8LI Data sheet ( Hoja de datos )
| Número de pieza | AD484M1644VTA-8LI | |
| Descripción | Ascend Semiconductor Corporation(64Mb SDRAM) | |
| Fabricantes | ETC | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AD484M1644VTA-8LI (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
|
No Preview Available !
Ascend Semiconductor Corporation 64Mb SDRAM
AASSCCEENNDD
SSeemmiiccoonndduuccttoorr
6644MM SSDDRRAAMM
DDaattaa sshheeeett
Tel: (03)5635888 / Fax: (03)5635188/ http://www.ascendsemi.com.tw
Preliminary
1
1 page  
Ascend Semiconductor Corporation 64Mb SDRAM
Pin Descriptions ( Simplified )
Pin
CLK
/CS
CKE
A0 ~ A11
BA0, BA1
/RAS
/CAS
/WE
Name
System Clock
Chip select
Clock Enable
Address
Bank Address
Pin Function
Master Clock Input(Active on the Positive rising edge)
Selects chip when active
Activates the CLK when “H” and deactivates when “L”.
CKE should be enabled at least one cycle prior to new
command. Disable input buffers for power down in standby.
Row address (A0 to A11) is determined by A0 to A11 level
at the bank active command cycle CLK rising edge.
CA(CA0 to CA7) is determined by A0 to A7 level at the
read or write command cycle CLK rising edge.
And this column address becomes burst access start
address. A10 defines the pre-charge mode. When A10 = High
at the pre-charge command cycle, all banks are pre-charged.
But when A10 = Low at the pre-charge command cycle,
only the bank that is selected by BA0/BA1 is pre-charged.
Selects which bank is to be active.
Row address strobe
Column address strobe
Write Enable
Latches Row Addresses on the positive rising edge of the
CLK with /RAS “L”. Enables row access & pre-charge.
Latches Column Addresses on the positive rising edge of the
CLK with /CAS low. Enables column access.
Latches Column Addresses on the positive rising edge of the
CLK with /CAS low. Enables column access.
LDQM/ UDQM
Data input/output Mask
DQM controls I/O buffers.
DQ0 ~ 15
VDD/VSS
VDDQ/VSSQ
NC
Data input/output
DQ pins have the same function as I/O pins on a conventional
DRAM.
Power supply/Ground
Power supply/Ground
No connection
VDD and VSS are power supply pins for internal circuits.
VDDQ and VSSQ are power supply pins for the output buffers.
This pin is recommended to be left No Connection on the
device.
Preliminary
5
5 Page 
Ascend Semiconductor Corporation 64Mb SDRAM
4. Operative Command Table
Current
state
/CS /R /C /W Addr.
Command
Action
HXXX
X
LHH X
X
L H L H BA/CA/A10
Idle L H L L BA/CA/A10
L L H H BA/RA
L L H L BA, A10
LL LH
X
L L L L Op-Code
HXXX
X
LHH X
X
L H L H BA/CA/A10
Row active L H L L BA/CA/A10
L L H H BA/RA
L L H L BA, A10
LL LH
X
L L L L Op-Code
HXXX
X
LHHH
X
LHH L
X
L H L H BA/CA/A10
Read
L L L L BA/CA/A10
L L H H BA/RA
L L H L BA/A10
LL LH
X
L L L L Op-Code
HXXX
X
LHHH
X
LHH L
X
L H L H BA/CA/A10
Write
L L L L BA/CA/A10
L L H H BA/RA
L L H L BA/A10
LL LH
X
L L L L Op-Code
DESL
NOP or BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP or BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
Nop or power down
Nop or power down
ILLEGAL
ILLEGAL
Row activating
Nop
Refresh or self refresh
Mode register accessing
Nop
Nop
Begin read : Determine AP
Begin write : Determine AP
ILLEGAL
Precharge
ILLEGAL
ILLEGAL
Continue burst to end → Row active
Continue burst to end → Row active
Burst stop → Row active
Terminate burst, new read : Determine AP
Terminate burst, start write : Determine AP
ILLEGAL
Terminate burst, pre-charging
ILLEGAL
ILLEGAL
Continue burst to end → Write recovering
Continue burst to end → Write recovering
Burst stop → Row active
Terminate burst, start read : Determine AP 7, 8
Terminate burst, new write : Determine AP 7
ILLEGAL
Terminate burst, pre-charging
ILLEGAL
ILLEGAL
Remark H = High level, L = Low level, X = High or Low level (Don't care)
Notes
2
2
3
3
4
5
5
3
6
4
7
7, 8
3
4
7,8
7
3
9
Preliminary
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet AD484M1644VTA-8LI.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AD484M1644VTA-8L | Ascend Semiconductor Corporation(64Mb SDRAM) | ETC |
| AD484M1644VTA-8LI | Ascend Semiconductor Corporation(64Mb SDRAM) | ETC |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |