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PDF 74HCT32 Data sheet ( Hoja de datos )
| Número de pieza | 74HCT32 | |
| Descripción | Quad 2-Input OR Gate | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 74HCT32 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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74HCT32
Quad 2−Input OR Gate with
LSTTL−Compatible Inputs
High−Performance Silicon−Gate CMOS
The 74HCT32 is identical in pinout to the LS32. The device has
TTL−compatible inputs.
Features
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS−Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 48 FETs or 12 Equivalent Gates
• These are Pb−Free Devices
http://onsemi.com
MARKING
DIAGRAMS
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
HCT32G
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
HCT
32
ALYWG
1G
HCT32 = Device Code
A = Assembly Location
L, WL = Wafer Lot
Y = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 0
1
Publication Order Number:
74HCT32/D
1 page  
INPUT
A OR B
OUTPUT Y
74HCT32
tr tf
90%
50%
10%
tPLH
90%
50%
10%
tTLH
tPHL
Figure 1. Switching Waveforms
VCC
GND
tTHL
DEVICE
UNDER
TEST
TEST
POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 2. Test Circuit
A
Y
B
Figure 3. Expanded Logic Diagram
(1/4 of the Device)
http://onsemi.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74HCT32.PDF ] | |
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