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PDF TMC2242B Data sheet ( Hoja de datos )

Número de pieza TMC2242B
Descripción Digital Half-Band Interpolating/Decimating Filter
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TMC2242A/TMC2242B
Digital Half-Band Interpolating/Decimating Filter
12-bit In/16-bit Out, 60 MHz
Features
• TMC2242A and TMC2242B are pin-compatible with
TMC2242
• User selectable interpolate gain, -6 dB or 0 dB (2242B)
• 30, 40 and 60 MHz speed grades
• User selectable 2:1 decimation, 1:2 interpolation, and
equal-rate filter modes
• Passband ripple < ±0.01 dB
• Stopband rejection 59.4 dB from 0.28 to 0.50 x fs
• Cascading two TMC2242A or TMC2242B meets
CCIR 601 low-pass filter requirement
• Dedicated 12-bit 2's complement input data port and
16-bit output data port with user-selectable rounding from
9 to 16 bits
• Two's complement or offset binary output format
• Built-in limiter prevents overflow
• Single +5 Volt power supply operation
• Small 44-Lead PLCC and 44-Lead MQFP
Applications
• Low-cost video filtering
• Chrominance bandwidth limiter
• Simple, inexpensive video D/A post-filters
• Reduced cost and complexity for A/D anti-aliasing filters
• High-performance digital low-pass filters
• Digital waveform reconstruction post-filtering
• Telecommunications
• Direct digital synthesis
• Radar
Description
The TMC2242A and TMC2242B are fixed-coefficient lin-
ear-phase half-band (low-pass) digital filters. They can be
used to halve or double the sampling rate of a digital signal.
When used as a decimating post-filter with a double-speed
oversampling A/D converter, they greatly reduce the cost and
complexity of anti-aliasing filters required ahead of the A/D
converter. When used as an interpolating pre-filter with a
double-speed oversampling D/A converter, the TMC2242A
and TMC2242B significantly reduce the design complexity
and production cost of reconstruction filters used on D/A
outputs.
The TMC2242A and TMC2242B user selects the mode of
operation (decimate, interpolate, or equal-rate) and round-
ing. The TMC2242A and TMC2242B accept 12-bit 2's com-
plement data at up to 60 MHz and output saturated
(overflow-protected) 2's complement or offset binary data
rounded to from 9 to 16 bits. Within the speed grade I/O
limit, the output sample rate may be 1/2, 1, or 2 times the
input sample rate.
Block Diagram
12
SI11-0
12
CLK
DEC
INT
SYNC
Control
12 12 55 Tap
FIR
Filter
Round 16
and
Limit
Interpolate 0-1-0-1
Decimate, Equal Rate 1-1-1-1
3
16
OE
16
SO15-0
TCO
RND2-0
65-2242A-01
Rev. 1.2.0

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TMC2242B pdf
TMC2242A/TMC2242B
Electrical Characteristics
Parameter
IDD Total Power Supply
Current
IDDU Power Supply Current,
Unloaded
IDDQ
CPIN
IIH
IIL
IOZH
IOZL
IOS
Power Supply Current,
Quiescent
I/O Pin Capacitance
Input Current, HIGH
Input Current, LOW
Leakage Current, HIGH
Leakage Current, LOW
Short-Circuit Current
VOH Output Voltage, HIGH
VOL Output Voltage, LOW
Conditions
VDD = Max, CLOAD=25pF, fCLK=Max
TMC2242A,B
TMC2242A-1,B-1
TMC2242A-2,B-2
VDD = Max, OE = HIGH, fCLK=Max
TMC2242A,B
TMC2242A-1,B-1
TMC2242A-2,B-2
VDD = Max, CLK = LOW
VDD = Max, VIN = VDD
VDD = Max, VIN = 0 V
OE = HIGH, VOUT = VDD
OE = HIGH, VOUT = 0 V
VDD = Max, Output = HIGH, one pin to
ground, one second duration max.
SO15-0, IOH = Max
SO15-0, IOL = Max
Min
-20
2.4
PRODUCT SPECIFICATION
Typ Max Units
150 mA
195 mA
290 mA
120 mA
155 mA
230 mA
5 mA
5 pF
±10 mA
±10 mA
±10 mA
±10 mA
-80 mA
V
0.4 V
Switching Characteristics
Parameter
tDO Output Delay Time
tHO Output Hold Time
tENA Output Enable Time
tDIS Output Disable Time
Conditions
CLOAD = 25 pF
CLOAD = 25 pF
CLOAD = 0 pF
CLOAD = 0 pF
Min Typ Max Units
15 ns
2.5 ns
12 ns
12 ns
5

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TMC2242B arduino
TMC2242A/TMC2242B
PRODUCT SPECIFICATION
Timing Diagrams (continued)
OE
Three-State
Outputs
tDIS 0.5V
tENA
2.0V
0.8V
0.5V
High Impedance
65-2242A-11
Figure 9. Threshold Levels for Three State Measurements
Applications Discussion
The TMC2242A and TMC2242B are well-suited for filtering
digitized composite NTSC or PAL video. In Figure 10, the
TMC1175A 8-bit video A/D converter outputs, D7-0, are
connected to the TMC2242B inputs, SI11-4, respectively
(grounding SI3-0). The RND2-0 controls are set to 111 for a
9-bit rounded decimated output on SO15-7.
In Figure 11, the TMC2242B drives a fast D/A converter to
reconstruct analog composite video. The TMC3003 10-bit
digital-to-analog converter inputs, D9-0 are connected to the
TMC2242B outputs SO15-6, respectively. The TMC2242B
RND2-0 controls are set to 110 for rounded 10-bit interpola-
tion operation.
TTL Clock
27.000 MHz (D1)
28.636 MHz (NTSC D2)
Composite
Video
75 Ohm
2 uH
2 uH
300 pF 510 pF
300 pF
65-2242A-12
75 Ohm
D7
TMC1175A
VIN 8-bit A/D
7
D6-0
AGND
SI11
TMC2242B
SI10-4
SO15
DEC=0
TCO=INT=1
SO14-7
MSB
8
9
27.000 MHz (D1)
28.636 MHz (NTSC D2)
13.500 MHz (D1)
14.318 MHz (NTSC D2)
Figure 10. Decimating Oversampled Video With a Low Cost 8-bit A/D
TTL Clock
27.000 MHz (D1)
28.636 MHz (NTSC D2)
MSB
TMC2242B SO15
SI11
12 11 LSB SI10-0
SO14-6
TCO=1 INT=DEC=0
9
D9 TMC3003
10-bit D/A
D8-0
IOUT
AGND
75 Ohm
13.500 MHz (D1)
14.318 MHz (NTSC D2)
27.000 MHz (D1)
28.636 MHz (NTSC D2)
2 uH
510 pF
300 pF
Note: Data buses are unsigned binarys; TMC2242 input is two’s complement.
Figure 11. Interpolating Digital Video Signals before Reconstruction
2 uH
300 pF
Composite
Video
75 Ohm
65-2242A-13
11

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