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PDF SP708T Data sheet ( Hoja de datos )
| Número de pieza | SP708T | |
| Descripción | 3.0V/3.3V Low Power Microprocessor Supervisory Circuits | |
| Fabricantes | Exar | |
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April 2015
SP706R/S/T - SP708R/S/T
3.0V/3.3V Low Power Microprocessor Supervisory
Circuits
Rev. 3.0.0
GENERAL DESCRIPTION
The SP706R/S/T and SP708R/S/T series is a
family of microprocessor (µP) supervisory
circuits that integrate myriad components
involved in discrete solutions which monitor
power-supply and battery in µP and digital
systems.
The SP706R/S/T and SP708R/S/T series will
significantly improve system reliability and
operational efficiency when compared to
solutions obtained with discrete components.
The features of the SP706R/S/T and
SP708R/S/T series include a watchdog timer, a
µP reset, a Power Fail Comparator, and a
manual-reset input.
The SP706R/S/T and SP708R/S/T series is ideal
for 3.0V or 3.3V applications in automotive
systems, computers, controllers, and intelligent
instruments. The SP706R/S/T and SP708R/S/T
series is an ideal solution for systems in which
critical monitoring of the power supply to the µP
and related digital components is demanded.
APPLICATIONS
Processors & DSPs Based Systems
Industrial & Medical Instruments
FEATURES
Precision Low Voltage Monitor
SP706R/SP708R: +2.63V
SP706S/SP708S: +2.93V
SP706T/SP708T: +3.08V
200ms RESET Pulse Width
SP706R/S/T: Active Low
SP708R/S/T: Active High and Active Low
Independent Watchdog Timer
1.6s Timeout (SP706R/S/T)
Enable/Disable Function
40µA Maximum Supply Current
Debounced TTL/CMOS Manual Reset
Input
RESET Asserted Down to VCC=1V
VCC Glitch Immunity
Voltage Monitor for Power Failure or
Low Battery Warning
8-Pin NSOIC and MSOP Packages
Pin Compatible with Industry
Standards 706R/S/T and 708R/S/T
Part Number
SP706R
SP706S
SP706T
SP708R
SP708S
SP708T
RESET Threshold
2.63V
2.93V
3.08V
2.63V
2.93V
3.08V
RESET Active
Low
Low
Low
Low and High
Low and High
Low and High
Manual RESET
Yes
Yes
Yes
Yes
Yes
Yes
Watchdog
Yes
Yes
Yes
No
No
No
PFI Accuracy
4%
4%
4%
4%
4%
4%
Exar Corporation
48720 Kato Road, Fremont CA 94538, USA
www.exar.com
Tel. +1 510 668-7000 – Fax. +1 510 668-7001
1 page  
SP706R/S/T - SP708R/S/T
3.0V/3.3V Low Power Microprocessor Supervisory
Circuits
PIN DESCRIPTION
Name
MR
VCC
GND
PFI
PFO
WDI
N.C.
RESET
WDO
RESET
Pin Number
SP706R/S/T
SOIC
MSOP
SP708R/S/T
SOIC
MSOP
1 313
2 424
3 535
4 646
5 757
6 8- -
- -68
7 171
8 2- -
- -82
Description
Manual Reset
This input triggers a reset pulse when pulled below 0.8V. This active
LOW input has an internal 70µA pull-up current. It can be driven
from a TTL or CMOS logic line or shorted to ground with a switch.
Voltage Input
Ground reference for all signals
Power-Fail Input
When this voltage monitor input is less than 1.25V, PFO goes LOW.
Connect PFI to ground or VCC when not in use.
Power-Fail Output
This output is LOW until PFI is less then 1.25V
Watchdog Input
If this input remains HIGH or LOW for 1.6s, the internal watchdog
timer times out and WDO goes LOW. Floating WDI or connecting WDI
to a high-impedance tri-state buffer disables the watchdog feature.
The internal watchdog timer clears whenever RESET is asserted, WDI
is tri-stated, or whenever WDI sees a rising or falling edge.
No Connect
Active-LOW RESET Output
This output pulses LOW for 200ms when triggered and stays LOW
whenever VCC is below the reset threshold. It remains LOW for 200ms
after Vcc rises above the reset threshold or MR goes from LOW to
HIGH. A watchdog timeout will not trigger RESET unless WDO is
connected to MR.
Watchdog Output
This output pulls LOW when the internal watchdog timer finishes its
1.6s count and does not go HIGH again until the watchdog is cleared.
WDO also goes LOW during low-line conditions. Whenever VCC is
below the reset threshold, WDO stays LOW. However, unlike RESET,
WDO does not have a minimum pulse width. As soon as VCC is above
the reset threshold, WDO goes HIGH with no delay.
Active-HIGH RESET Output
This output is the complement of RESET. Whenever RESET is HIGH,
RESET is LOW and vice-versa. Note that the SP708R/S/T has a reset
output only.
ORDERING INFORMATION
Part Number
SP706RCN-L
SP706RCN-L/TR
SP706RCU-L
SP706RCU-L/TR
SP706REN-L
SP706REN-L/TR
SP706REU-L
SP706REU-L/TR
SP706SCN-L
SP706SCN-L/TR
SP706SCU-L
SP706SCU-L/TR
Temperature
Range
0°C≤TA≤+70°C
0°C≤TA≤+70°C
0°C≤TA≤+70°C
0°C≤TA≤+70°C
-40°C≤TA≤+85°C
-40°C≤TA≤+85°C
-40°C≤TA≤+85°C
-40°C≤TA≤+85°C
0°C≤TA≤+70°C
0°C≤TA≤+70°C
0°C≤TA≤+70°C
0°C≤TA≤+70°C
© 2015 Exar Corporation
Marking
SP706RC
YYWWL
X
706R
CXXX
YWW
SP706RE
YYWWL
X
706R
EXXX
YWW
SP706SC
YYWWL
X
706S
CXXX
YWW
Package
Packing
Quantity
Note 1
8-pin NSOIC
Bulk
Lead Free
8-pin NSOIC 2.5K/Tape & Reel Lead Free
8-pin MSOP
Bulk
Lead Free
8-pin MSOP 2.5K/Tape & Reel Lead Free
8-pin NSOIC
Bulk
Lead Free
8-pin NSOIC 2.5K/Tape & Reel Lead Free
8-pin MSOP
Bulk
Lead Free
8-pin MSOP 2.5K/Tape & Reel Lead Free
8-pin NSOIC
Bulk
Lead Free
8-pin NSOIC 2.5K/Tape & Reel Lead Free
8-pin MSOP
Bulk
Lead Free
8-pin MSOP 2.5K/Tape & Reel Lead Free
5/17
Note 2
Rev. 3.0.0
5 Page 
SP706R/S/T - SP708R/S/T
3.0V/3.3V Low Power Microprocessor Supervisory
Circuits
FEATURES
The SP706R/S/T and SP708R/S/T series
provides four key functions:
1. A reset output during power-up, power-down
and brownout conditions.
2. An independent watchdog output that goes
LOW if the watchdog input has not been toggled
within 1.6 seconds.
3. A 1.25V threshold detector for power-fail
warning, low battery detection, or monitoring a
power supply other than +3.3V/+3.0V.
4. An active-LOW manual-reset that allows
RESET to be triggered by a pushbutton switch.
The SP706R/S/T devices are the same as the
SP708R/S/T devices except for the active-HIGH
RESET substitution of the watchdog timer.
THEORY OF OPERATION
The SP706R/S/T-SP708R/S/T series is a
microprocessor (µP) supervisory circuit that
monitors the power supplied to digital circuits
such as microprocessors, microcontrollers, or
memory. The series is an ideal solution for
portable, battery-powered equipment that
requires power supply monitoring.
Implementing this series will reduce the
number of components and overall complexity.
The watchdog functions of this product family
will continuously oversee the operational status
of a system. The operational features and
benefits of the SP706R/S/T-SP708R/S/T series
are described in more detail below.
previously initiated reset pulse, the pulse
continues for at least another 140ms. On power
down, once VCC falls below the reset threshold,
RESET stays LOW and is guaranteed to be 0.4V
or less until VCC drops below 1V.
The active-HIGH RESET output is simply the
complement of the RESET output and is
guaranteed to be valid with VCC down to 1.1V.
Some µPs, such as Intel's 80C51, require an
active-HIGH reset pulse.
WATCHDOG TIMER
The SP706R/S/T-SP708R/S/T watchdog circuit
monitors the µP's activity. If the µP does not
toggle the watchdog input (WDI) within 1.6
seconds and WDI is not tri-stated, WDO goes
LOW. As long as RESET is asserted or the WDI
input is tri-stated, the watchdog timer will stay
cleared and will not count. As soon as RESET is
released and WDI is driven HIGH or LOW, the
timer will start counting. Pulses as short as
50ns can be detected.
Typically, WDO will be connected to the non-
maskable interrupt input (NMI) of a µP. When
VCC drops below the reset threshold, WDO will
go LOW whether or not the watchdog timer had
timed out. Normally this would trigger an NMI
but RESET goes LOW simultaneously and thus
overrides the NMI.
If WDI is left unconnected, WDO can be used as
a low-line output. Since floating WDI disables
the internal timer, WDO goes LOW only when
VCC falls below the reset threshold, thus
functioning as a low-line output.
RESET OUTPUT
A microprocessor's reset input starts the µP in
a known state. The SP706R/S/T-SP708R/S/T
series asserts reset during power-up and
prevents code execution errors during power
down or brownout conditions.
On power-up, once VCC reaches 1V, RESET is a
guaranteed logic LOW of 0.4V or less. As VCC
rises, RESET stays LOW. When VCC rises above
the reset threshold, an internal timer releases
RESET after 200ms. RESET pulses LOW
whenever VCC dips below the reset threshold,
such as in a brownout condition. When a
brownout condition occurs in the middle of a
© 2015 Exar Corporation
11/17
Fig. 18: Watchdog Timing Waveforms
Rev. 3.0.0
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet SP708T.PDF ] | |
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