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PDF CS5516 Data sheet ( Hoja de datos )
| Número de pieza | CS5516 | |
| Descripción | 16-Bit/20-Bit Bridge Transducer A/D Converter | |
| Fabricantes | Crystal | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CS5516 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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CS5516
CS5520
16-Bit/20-Bit Bridge Transducer A/D Converter
Features
Description
l On-chip Instrumentation Amplifier
l On-chip Programmable Gain Amplifier
l On-Chip 4-Bit D/A For Offset Removal
l Dynamic Excitation Options
l Linearity Error: ±0.0015% FS
- 20-Bit No Missing Codes
l CMRR at 50/60 Hz > 200 dB
l System Calibration Capability with calibration
read/write option
l 3, 4 or 5 wire Serial Communications Port
l Low Power Consumption: 40 mW
- 10 µW Standby Mode for Portable applications
The CS5516 and CS5520 are complete solutions for dig-
itizing low level signals from strain gauges, load cells,
and pressure transducers. Any family of mV output
transducers, including those requiring bridge excitation,
can be interfaced directly to the CS5516 or CS5520. The
devices offer an on-chip software programmable instru-
mentation amplifier block, choice of DC or AC bridge
excitation, and software selectable reference and signal
demodulation.
The CS5516 uses delta-sigma modulation to achieve
16-bit resolution at output word rates up to 60 Hz. The
CS5520 achieves 20-bit resolution at word rates up to
60 Hz.
The CS5516 and CS5520 sample at a rate set by the
user in the form of either an external CMOS clock or a
crystal. On-chip digital filtering provides rejection of all
frequencies above 12 Hz for a 4.096 MHz clock.
The CS5516 and CS5520 include system calibration to
null offset and gain errors in the input channel. The digi-
tal values associated with the system calibration can be
written to, or read from, the calibration RAM locations at
any time via the serial communications port. The 4-bit
DC offset D/A converter, in conjunction with digital cor-
rection, is initially used to zero the input offset value.
ORDERING INFORMATION
See page 29.
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Cirrus Logic, Inc.
Crystal Semiconductor Products Division
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.crystal.com
Copyright © Cirrus Logic, Inc. 1997
(All Rights Reserved)
MAR ‘95
DS74F1
1
1 page  
CS5516, CS5520
ANALOG CHARACTERISTICS (continued)
Parameter
Min Typ Max Units
Modulator Differential Voltage Reference
Nominal Output Voltage
- 3.75 -
V
Initial Output Voltage Tolerance
- ±100 - mV
Temperature Coefficient
Line Regulation
- 100 - ppm/°C
(4.75V < VA < 5.25V)
-
0.5
- mV/V
Output Voltage Noise
Output Current Drive:
Power Supplies
0.1 to 15 Hz
Source Current
Sink Current
-
-
-
10 - µVp-p
- 20 µA
- 20 µA
DC Power Supply Currents
Power Dissipation:
Power Supply Rejection:
dc
dc
IA+
IA-
ID+
ID-
(Note 7)
Normal Operation
Standby Mode
Positive Supplies
Negative Supplies
-
-
-
-
-
-
-
-
2.7 3.5 mA
-2.7 -3.5 mA
1.5 2.2 mA
-0.6 -0.8 mA
37.5 - mW
10 - µW
100 - dB
95 - dB
System Calibration Specifications
Positive Full Scale Calibration Range
(Note 8)
Unipolar Mode 0.8T
-
1.2T
V
Bipolar Mode 0.8T
-
1.2T
V
Maximum Ratiometric Offset Calibration Range
(Note 8)
Unipolar Mode -2T - +2T V
Bipolar Mode -2T - +2T V
Differential Input Voltage Range
(Notes 4, 8, 9, 10)
Unipolar Mode
Bipolar
Voffset + (1.2T)
Voffset ± (1.2T)
V
V
Notes: 7. All outputs unloaded. All inputs CMOS levels.
8. T=VREF/(Gx25), where T is the full scale span, where VREF is the differential voltage across
VREF+ and VREF- in volts, and G is the gain setting of the second gain block. G can be set
to 1, 2, 4, 8. This sets the overall gain to 25, 50, 100, 200. The gain can then be fine tuned by
using the calibration of the full scale point.
9. When calibrated.
10. Voffset is the offset corrected by the offset calibration routine. Voffset may be as large as 2T.
DS74F1
5
5 Page 
CS5516, CS5520
THEORY OF OPERATION
The front page of this data sheet illustrates the
block diagram of the CS5516 and CS5520 A/D
converter. The device includes an instrumenta-
tion amplifier with a fixed gain of 25. This
chopper-stabilized instrumentation amplifier is
followed by a programmable gain stage with
gain settings of 1, 2, 4, and 8. The sensitivity of
the input is a function of the programmable gain
setting and of the reference voltage connected
between the VREF+ and VREF- pins of the de-
vice. The full scale of the converter is VREF/( G
x 25) in unipolar, or ±VREF/(G x 25) in bipolar,
where VREF is the reference voltage between
the VREF+ and VREF- pins, G is the gain set-
ting of the programmable gain amplifier, and 25
is the gain of the instrumentation amplifier.
After the programmable gain block, the output
of a 4-bit DAC is combined with the input sig-
nal. The DAC can be used to add or subtract
offset from the analog input signal. Offsets as
large as ±200 % of full scale can be trimmed
from the input signal.
The CS5516 and CS5520 are optimized to per-
form ratiometric measurement of bridge-type
transducers. The devices support dc bridge exci-
tation or two modes of ac (switched dc) bridge
excitation. In the switched-dc modes of opera-
tion the converter fully demodulates both the
reference voltage and the analog input signal
from the bridge.
+5V
Analog
Supply
-
Unused logic inputs
must be connected
to DGND or VD+
-5V
Analog
Supply
10 Ω
1 µF 0.1 µF
0.1 µF 1 µF
1 µF
2
1
3
VA+
MDRV-
MDRV+
20
VD+
XOUT 23
XIN 22
CS5516
CS5520
SCLK 16
18
9 VREF+
SOD
SID 17
+
10 VREF-
SMODE 24
Optional
Clock
Source
Serial
Data
Interface
6 AIN+
7 AIN-
5 AGND1
8 AGND2
DRDY
RST
CS
DGND
15
13
14
19
Control
Logic
0.1 µF 1 µF
VA- VD-
4 21
10 Ω
1 µF
0.1 µF
Figure 2. System Connection Diagram: DC Excitation Mode (EXC bit = 0), F1 = F0 = 0.
DS74F1
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CS5516.PDF ] | |
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