|
|
PDF CY62168G Data sheet ( Hoja de datos )
| Número de pieza | CY62168G | |
| Descripción | 16-Mbit (2M words x 8 bits) Static RAM | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de CY62168G (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
|
No Preview Available !
CY62168G/CY62168GE MoBL®
16-Mbit (2M words × 8 bits) Static RAM
with Error-Correcting Code (ECC)
16-Mbit (2M words × 8 bits) Static RAM with Error-Correcting Code (ECC)
Features
■ Ultra-low standby power
❐ Typical standby current: 5.5 A
❐ Maximum standby current: 16 A
■ High speed: 45 ns/55 ns
■ Embedded error-correcting code (ECC) for single-bit error
correction
■ Wide voltage range: 1.65 V to 2.2 V, 2.2 V to 3.6 V, 4.5 V to 5.5 V
■ 1.0 V data retention
■ Transistor-transistor logic (TTL) compatible inputs and outputs
■ ERR pin to indicate 1-bit error detection and correction
■ Available in Pb-free 48-ball VFBGA package
Functional Description
CY62168G and CY62168GE are high-performance CMOS
low-power (MoBL) SRAM devices with embedded ECC. Both
devices are offered in single and dual chip enable options and in
multiple pin configurations. The CY62168GE device includes an
error indication pin that signals a single-bit error-detection and
correction event during a read cycle.
Devices with a single chip enable input are accessed by
asserting the chip enable input (CE) LOW. Dual chip enable
devices are accessed by asserting both chip enable inputs – CE1
as LOW and CE2 as HIGH.
Write to the device by taking Chip Enable 1 (CE1) LOW and
Chip Enable 2 (CE2) HIGH and the Write Enable (WE) input
LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written
into the location specified on the address pins (A0 through A20).
Read from the device by taking Chip Enable 1 (CE1) and
Output Enable (OE) LOW and Chip Enable 2 (CE2) HIGH while
forcing Write Enable (WE) HIGH. Under these conditions, the
contents of the memory location specified by the address pins
will appear on the I/O pins.
The eight input and output pins (I/O0 through I/O7) are placed in
a high impedance state when the device is deselected (CE1
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or a
write operation is in progress (CE1 LOW and CE2 HIGH and WE
LOW). See the Truth Table – CY62168G/CY62168GE on page
14 for a complete description of read and write modes.
On CY62168GE devices, the detection and correction of a single
bit error in the accessed location is indicated by the assertion of
the ERR output (ERR = HIGH) [1].
The CY62168G and CY62168GE devices are available in a
Pb-free 48-pin VFBGA package. The logic block diagrams are
on page 2.
For a complete list of related resources, click here.
Product Portfolio
Product
Features and Options
(see Pin
Configurations
section)
Range
CY62168G(E)18 Single or dual Chip
Enables
CY62168G(E)30
CY62168G(E) Optional ERR pin
Industrial
VCC Range (V)
1.65 V–2.2 V
2.2 V–3.6 V
4.5 V–5.5 V
Power Dissipation
Speed
(ns)
Operating ICC, (mA)
f = fmax
Typ[2]
Max
Standby, ISB2 (µA)
Typ[2]
Max
55 29
32
7
26
45 29 36 5.5 16
Notes
1. This device does not support automatic write-back on error detection.
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = 1.8 V (for VCC range of 1.65 V–2.2 V), VCC = 3 V
(for VCC range of 2.2 V–3.6 V), and VCC = 5 V (for VCC range of 4.5 V–5.5 V), TA = 25 °C.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-84771 Rev. *H
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 3, 2016
1 page  
CY62168G/CY62168GE MoBL®
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature
with power applied .................................. –55 °C to + 125 °C
Supply voltage to ground potential ...................–0.5 V to 6 V
DC voltage applied to outputs
in High Z state[5] .................................. –0.5 V to VCC + 0.5 V
DC input voltage[5] .............................. –0.5 V to VCC + 0.5 V
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(MIL-STD-883, Method 3015) ................................. >2001 V
Latch up current ...................................................... >140 mA
Operating Range
Grade
Industrial
Ambient Temperature
–40 C to +85 C
VCC[6]
1.65 V to 2.2 V,
2.2 V to 3.6 V,
4.5 V to 5.5 V
DC Electrical Characteristics
Over the operating range of –40 C to 85 C
Parameter
Description
Test Conditions
VOH Output HIGH 1.65 V to 2.2 V VCC = Min, IOH = –0.1 mA
voltage
2.2 V to 2.7 V VCC = Min, IOH = –0.1 mA
2.7 V to 3.6 V VCC = Min, IOH = –1.0 mA
4.5 V to 5.5 V VCC = Min, IOH = –1.0 mA
4.5 V to 5.5 V VCC = Min, IOH = –0.1 mA
VOL Output LOW 1.65 V to 2.2 V VCC = Min, IOL = 0.1 mA
voltage
2.2 V to 2.7 V VCC = Min, IOL = 0.1 mA
2.7 V to 3.6 V VCC = Min, IOL = 2.1 mA
4.5 V to 5.5 V VCC = Min, IOL = 2.1 mA
VIH Input HIGH 1.65 V to 2.2 V –
voltage
2.2 V to 2.7 V –
2.7 V to 3.6 V –
4.5 V to 5.5 V –
VIL
Input LOW
voltage[9]
1.65 V to 2.2 V –
2.2 V to 2.7 V –
2.7 V to 3.6 V –
4.5 V to 5.5 V –
IIX Input leakage current
GND < VIN < VCC
IOZ Output leakage current GND < VOUT < VCC, Output disabled
45 ns/55 ns
Min Typ [7] Max
1.4 –
–
2.0 –
–
2.4 –
–
2.4
VCC – 0.4 [8]
–
–
–
–
–
–
0.2
– – 0.4
– – 0.4
– – 0.4
1.4
1.8
2.0
2.2
–0.2
– VCC + 0.2
– VCC + 0.3
– VCC + 0.3
– VCC + 0.5
– 0.4
–0.3 –
0.6
–0.3 –
0.8
–0.5 –
0.8
–1.0 – +1.0
–1.0 – +1.0
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
Notes
5. VIL(min) = –2.0 V and VIH(max) = VCC + 2 V for pulse durations of less than 20 ns.
6. Full Device AC operation assumes a 100 µs ramp time from 0 to VCC(min) and 200 µs wait time after VCC stabilization.
7. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = 1.8 V (for VCC range of 1.65 V–2.2 V), VCC = 3 V
(for VCC range of 2.2 V–3.6 V), and VCC = 5 V (for VCC range of 4.5 V–5.5 V), TA = 25 °C.
8. This parameter is guaranteed by design and is not tested.
9. VIL(min) = –2.0 V and VIH(max) = VCC + 2 V for pulse durations of less than 20 ns.
Document Number: 001-84771 Rev. *H
Page 5 of 19
5 Page 
CY62168G/CY62168GE MoBL®
Switching Waveforms (continued)
Figure 7. Read Cycle No. 2 (OE Controlled)[27, 28, 29]
ADDRESS
tRC
CE
tACE
tPD
t HZCE
OE
DATA I /O
VCC
SUPPLY
CURRENT
tDOE
tLZOE
HIGH IMPEDANCE
tLZCE
tPU
t HZOE
DATAOUT VALID
HIGH
IMPEDANCE
ISB
Notes
27. WE is HIGH for read cycle.
28. For all dual chip enable devices, CE is the logical combination of CE1 and CE2. When CE1 is LOW and CE2 is HIGH, CE is LOW; when CE1 is HIGH or CE2 is LOW,
CE is HIGH.
29. Address valid prior to or coincident with CE LOW transition.
Document Number: 001-84771 Rev. *H
Page 11 of 19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet CY62168G.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| CY62168DV30 | 16-Mbit (2048K x 8) Static RAM | Cypress Semiconductor |
| CY62168EV30 | 16-Mbit (2 M x 8) Static RAM | Cypress Semiconductor |
| CY62168G | 16-Mbit (2M words x 8 bits) Static RAM | Cypress Semiconductor |
| CY62168GE | 16-Mbit (2M words x 8 bits) Static RAM | Cypress Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |