DataSheet39.com

IDT70V9089S Datasheet PDF - IDT

Part Number IDT70V9089S
Description HIGH-SPEED 3.3V 64/32K x 8 SYNCHRONOUS DUAL-PORT STATIC RAM
Manufacturers IDT 
Logo IDT Logo 

Preview ( 19 pages )
		
IDT70V9089S datasheet, circuit
HIGH-SPEED 3.3V
64/32K x 8 SYNCHRONOUS
Š DUAL-PORT STATIC RAM
IDT70V9089/79S/L
Features:
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed clock to data access
– Commercial: 6.5/7.5/9/12/15ns (max.)
– Industrial: 12ns (max.)
Low-power operation
– IDT70V9089/79S
Active: 429mW (typ.)
Standby: 3.3mW (typ.)
– IDT70V9089/79L
Active: 429mW (typ.)
Standby: 1.32mW (typ.)
Flow-Through or Pipelined output mode on either port via
the FT/PIPE pin
Counter enable and reset features
Dual chip enables allow for depth expansion without
additional logic
Full synchronous operation on both ports
– 4ns setup to clock and 1ns hold on all control, data, and
address inputs
– Data input, address, and control registers
– Fast 6.5ns clock to data out in the Pipelined output mode
– Self-timed write allows fast cycle time
– 10ns cycle time, 100MHz operation in the Pipelined output mode
LVTTL- compatible, single 3.3V (±0.3V) power supply
Industrial temperature range (–40°C to +85°C) is
available for selected speeds
Available in a 100 pin Thin Quad Flatpack (TQFP) package
Green parts available, see ordering information
Functional Block Diagram
R/WL
OEL
CE0L
CE1L
1
0
0/1
R/WR
OER
CE0R
1 CE1R
0
0/1
FT/PIPEL
I/O0L - I/O7L
0/1 1
0
I/O
Control
I/O
Control
0 1 0/1
FT/PIPER
,
I/O0R - I/O7R
A15L(1)
A0L
CLKL
ADSL
CNTENL
CNTRSTL
NOTE:
1. A15X is a NC for IDT70V9079.
Counter/
Address
Reg.
©2014 Integrated Device Technology, Inc.
MEMORY
ARRAY
1
Counter/
Address
Reg.
A15R(1)
A0R
CLKR
ADSR
CNTENR
CNTRSTR
3750 drw 01
JULY 2014
DSC 3750/12

No Preview Available !


1 page
line_dark_gray
IDT70V9089S equivalent
IDT70V9089/79S/L
High Speed 3.3V 64/32K x 8 Synchronous Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VDD = 3.3V ± 0.3V)
70V9089/79S
Symbol
Parameter
Test Conditions
Min. Max.
|ILI| Input Leakage Current(1)
VDD = 3.3V, VIN = 0V to VDD
___ 10
|ILO| Output Leakage Current
CE0 = VIH or CE1 = VIL, VOUT = 0V to VDD
___ 10
VOL Output Low Voltage
IOL = +4mA
___ 0.4
VOH Output High Voltage
IOH = -4mA
2.4 ___
NOTE:
1. At VDD < 2.0V input leakages are undefined.
70V9089/79L
Min. Max. Unit
___ 5 µA
___ 5 µA
___ 0.4 V
2.4 ___ V
3750 tbl 08
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range(6) (VDD = 3.3V ± 0.3V)
70V9089/79X6
Com'l Only
70V9089/79X7
Com'l Only
70V9089/79X9
Com'l Only
Symbol
Parameter
Test Condition
Version
Typ.(4) Max. Typ.(4) Max. Typ.(4) Max. Unit
ICC Dynamic Operating
Current
(Both Ports Active)
CEL and CER = VIL
Outputs Disabled
f = fMAX(1)
COM'L S 220 395 200 335 180 260 mA
L 220 350 200 290 180 225
IND S ____ ____ ____ ____ ____ ____
L ____ ____ ____ ____ ____ ____
ISB1 Standby Current
(Both Ports - TTL
Level Inputs)
CEL and CER = VIH
f = fMAX(1)
COM'L S 70 145 60 115 50 75 mA
L 70 130 60 100 50 65
IND S ____ ____ ____ ____ ____ ____
L ____ ____ ____ ____ ____ ____
ISB2 Standby Current
(One Port - TTL
Level Inputs)
CE"A" = VIL and
COM'L S 150 280 130 240 110 170 mA
CE"B" = VIH(3)
L 150 250 130 210 110 150
Active Port Outputs Disabled,
f= fM AX(1)
IND S ____ ____ ____ ____ ____ ____
L ____ ____ ____ ____ ____ ____
ISB3 Full Standby Current
(Both Ports -
CMOS Level Inputs)
Both Ports CER and
CEL > VDD - 0.2V
VIN > VDD - 0.2V or
VIN < 0.2V, f = 0(2)
COM'L S 1.0 5 1.0 5 1.0 5 mA
L 0.4 3 0.4 3 0.4 3
IND S ____ ____ ____ ____ ____ ____
L ____ ____ ____ ____ ____ ____
ISB4 Full Standby Current
CE"A" < 0.2V and
COM'L S 140 270 120 230 100 160 mA
(One Port -
CE"B" > VDD - 0.2V(5)
L 140 240 120 200 100 140
CMOS Level Inputs)
VIN > VDD - 0.2V or
VIN < 0.2V, Active Port
IND S ____ ____ ____ ____ ____ ____
Outputs Disabled, f = fMAX(1)
L ____ ____ ____ ____ ____ ____
3750 tbl 09a
NOTES:
1. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS" at input
levels of GND to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. VDD = 3.3V, TA = 25°C for Typ, and are not production tested. ICC DC(f=0) = 90mA (Typ).
5. CEX = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX < 0.2V means CE0X < 0.2V and CE1X > VDD - 0.2V
CEX > VDD - 0.2V means CE0X > VDD - 0.2V or CE1X < 0.2V
"X" represents "L" for left port or "R" for right port.
6. 'X' in part number indicates power rating (S or L).
6.452

5 Page
line_dark_gray


Information Total 19 Pages
Download[ IDT70V9089S.PDF Datasheet ]

Share Link :

Electronic Components Distributor

SparkFun Electronics Allied Electronics DigiKey Electronics Arrow Electronics
Mouser Electronics Adafruit Element14 Chip One Stop



Featured Datasheets

Part NumberDescriptionManufacturers
IDT70V9089The function is HIGH-SPEED 3.3V 64/32K x 8 SYNCHRONOUS DUAL-PORT STATIC RAM.IDT
IDT
IDT70V9089LThe function is HIGH-SPEED 3.3V 64/32K x 8 SYNCHRONOUS DUAL-PORT STATIC RAM.IDT
IDT
IDT70V9089SThe function is HIGH-SPEED 3.3V 64/32K x 8 SYNCHRONOUS DUAL-PORT STATIC RAM.IDT
IDT

Quick jump to:

IDT7  1N4  2N2  2SA  2SC  74H  ADC  BC  BF  BU  CXA  HCF  IRF  KA  KIA  LA  LM  MC  NE  ST  STK  TDA  TL  UA 


DataSheet39.com is an Online Datasheet PDF Search Site.
It offers a large amount of data sheet, You can free PDF files download.
The updated every day, always provide the best quality and speed.



keyword : IDT70V9089S schematic, IDT70V9089S equivalent, IDT70V9089S pinout

DataSheet39.com   |  2018   |  Privacy Policy |  Contact Us  | New  |  Search