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PDF TD028TTEB5 Data sheet ( Hoja de datos )
| Número de pieza | TD028TTEB5 | |
| Descripción | TFT LCD | |
| Fabricantes | toppoly | |
| Logotipo |  |
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11 TD028TTEB5
Ver 1.1
TFT LCD Specification
Model NO.: TD028TTEB5
Customer Signature
Date
The information contained herein is the exclusive property of toppoly Optoelectronics corporation, and shall not be
distributed, reproduced, or disclosed in whole or in part without prior written permission of toppoly Optoelectronics
corporation.
Page: 1/37
1 page  
55
3. INPUT/OUTPUT TERMINALS
3.1 TFT LCD module
Recommend connector: FH23-39S-0.3SHW(05)/HIROSE
Pin Symbol
I/O
Description
1 LED+
- High Voltage Power Supply for LED
2 LED-
- LowVoltage Power Supply for LED
3 DVDD
- Power Supply of Digital
4 AVDD
- Input to DC/DC
5 VSS
- Ground
6 YU
- Touch Panel Y(12Clock Side)
7 XL
- Touch Panel X(Left Side)
8 YL
- Touch Panel Y(6Clock Side)
9 XR
- Touch Panel X(Right Side)
10 SPI_CS
I SPI Chip Select
11 SPI_SDA
12 VSS
13 SPI_SCL
14 SD
15 RST
16 B0/ID1
17 B1
18 B2
19 B3
20 B4
21 B5
22 G0/ID2
23 G1
24 G2
25 G3
26 G4
27 G5
I/O SPI Serial Data Input/Output
- Ground
- SPI Clock
I Auto power on/of sequence enable input
I RESET(L: Reset, H: Active)
BLUE data Bit B0(LSB)/LCM ID Pin 1
I
(Pull-down 10K to VSS by Resistor)
I BLUE data Bit B1
I BLUE data Bit B2
I BLUE data Bit B3
I BLUE data Bit B4
I BLUE data Bit B5(MSB)
GREEN data Bit G0(LSB)/LCM ID Pin 2
I
(Pull-high 10K to DVDD by Resistor)
I GREEN data Bit G1
I GREEN data Bit G2
I GREEN data Bit G3
I GREEN data Bit G4
I GREEN data Bit G5(MSB)
TD028TTEB5
Remark
Reserved for
Register Setup
Reserved for
Register Setup
Reserved for
Register Setup
The information contained herein is the exclusive property of toppoly Optoelectronics corporation, and shall not be
distributed, reproduced, or disclosed in whole or in part without prior written permission of toppoly Optoelectronics
corporation.
Page: 5/37
5 Page 
1111 TD028TTEB5
7. TIMING CHART
7.1Display timing
Display
Mode
Parameter
Symbol Conditions
Ratings
Unit Remark
MIN TYP MAX
Vertical Cycle
Vertical Pulse Low width
VP
VS
430 435 450 Line
1 2－
Normal
Vertical Data Start
Vertical Front Porch
Vertical Blanking Period
Vertical Active Area
Horizontal Cycle
Horizontal Pulse Low Width
Horizontal Data Start
Horizontal Front Porch
Horizontal Blanking Period
Horizontal Active Area
Clock Frequency
VDS VS+VBP
2 4 15 Line *Note1
VFP 108 111 － Line
VBL
VS+VBP+VFP 110 115
－ Line
VDISP
－ 320 － Line
HP 260 280 300 dot
HS 2 10 － dot
HDS HS+HBP
10 30 63 dot *Note2
HFP － 10 － dot
HBL VS+VBP+VFP 20 40 －
HDISP
－ 240 － dot
fDCK
6.7 7.3 8.5 MHz
tDCK
149 136 118 nS
Note1 Please change the register R3 via SPI command to modify the VDS(Min./Max.)
Note2 Please change the register R4 via SPI command to modify the HDS(Min./Max.)
The information contained herein is the exclusive property of toppoly Optoelectronics corporation, and shall not be
distributed, reproduced, or disclosed in whole or in part without prior written permission of toppoly Optoelectronics
corporation.
Page: 11/37
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TD028TTEB5.PDF ] | |
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