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PDF UPD445L Data sheet ( Hoja de datos )
| Número de pieza | UPD445L | |
| Descripción | FULLY DECODED 4096 STATIC CMOS RAM | |
| Fabricantes | NEC | |
| Logotipo |  |
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NEe Microcomputers, Inc.
NEe
fLPD445L
fLPD445L·1
FULLY DECODED 4096 STATIC CMOS RAM
DESCRIPTION
The ~PD445L is a very low power 4,,096 bit (1024 words by 4 bits) static RAM fabricated
with NEC's complementary MOS (CMOS) process, It has two chip enable inputs (CE1,
CE2). Minimum standby current is drawn when CE1 is at a high level, while inhibiting
I I 'all address and control line transitions or, unconditionally when CE2 is at a low level.
This device ideally meets the low power requirements of battery operated systems and
battery back-up systems for non-volatility of data.
The ~PD445L uses fully static circuitry requiring no clocking. Output data is read out
non-destructively by placing a high on the R/W pin and has the same polarity as input
data. All inputs and outputs are directly TTL compatible. The device has common
input/output data busses and an OD (Output Disable) pin for use in common I/O bus
systems.
". The ~PD445L is guaranteed to retain data with the power supply voltage as low as 2.0
volts.
FEATURES
• Single +5V Power Supply
• Ideal for Battery Operation
• Low Standby Power fllr Dat,a Retention
• Simple Memory Expansion - Chip Enable Inputs
• Access Time - 650 ns Max. {J,tPD445L)
4.50 ns Max. (~PD445L-1)
• Directly TTL Compatible - All Inputs and Outputs
• Common Data Input and Output
• Static CMOS - No Clock or Refreshing Required
• 20 Pin Dual-In-Line Plastic Package
PIN CONFIGURATION
A3
A2
A,
AO
AS
As
A7
GNO
I/O,
1/°2
VCC
A4
R/W
eE,
00
CE2
A8
Ag
1/°4
1/03
PIN NAMES
Ao-Ag
00
R/W
CE,
CE2
1/0,-1/°4
VCC
GNO
Address Input
Output Disable
Read/Write.
Chip Enable'
Chip Enable 2
Data Input/Output
Power Supply
GrO\lnd
OPERATION MODES
CE, CE2 00
,0 0
, ,0
Others
Chip
Selected
Non-Selected
Output Mode
Data Out
High Impedance
93
1 page  
LOW Vee DATA RETENTIONG)
DATA RETENTION MODE ____
SUPPLY VOLTAGE (Veel
VI~
VCCDA
f:IH
CHIP ENABLE (CE2)
O.2V " " _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
O.2V
w-----------------------------
Note (i) Apply less than VCCDR 10.111 H'pulS lor data retentiOn mode
JLPD445L
II
r -··------~--A
I
I
~, ;q' tHI! .•
,'
'.
;I I
: 1.1 J
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I.
.,
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I
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:
>-e I- ~ F i- _ _':~~--- -b~.~
j
PACKAGE OUTLINE
~PD445LC
(PLASTIC)
ITEM
MILLIMETERS
A 27.00
B 2.07
1 - -C - - -1---~5_4_ _ ..
~-.
0.50
----
--
E 22.86
F 1.20
G 2.54 MIN
H 0.50 MIN
I 4.58 MAX
J 5.08 MAX
K
L
1------
M
- -1-0.-16- -
-- 8_6. 0
025+0. 10
. -0.05
INCHES
1.07
0.08
0.10
0.02
0.90
0.05
0.10 MIN
0.02 MIN
0.18
0.20
0.40
0.39
0.01 +0.004
-0.002
44SLDS-12-80-CAT
97
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet UPD445L.PDF ] | |
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