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PDF 100EP111U Data sheet ( Hoja de datos )

Número de pieza 100EP111U
Descripción LVPECL/LVECL/HSTL CLOCK DRIVER
Fabricantes Micrel Semiconductor 
Logotipo Micrel Semiconductor Logotipo



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No Preview Available ! 100EP111U Hoja de datos, Descripción, Manual

Micrel, Inc.
2.5V/3.3V 1:10 DIFFERENTIAL
Precision Edge®
PrecisioSnY1E0d0EgPe1®11U
LVPECL/LVECL/HSTL CLOCK DRIVER SY100EP111U
FEATURES
2.5V and 3.3V power supply options
Guaranteed AC parameters over temperature:
• fMAX = 3GHz
• < 25ps output-to-output skew
• < 250ps tr / tf
• < 400ps propagation delay
Wide temperature range: –40°C to +85°C
Differential design
VBB output for single-ended input applications
Fully compatible with industry standard 100K I/O
levels
Available in 32-pin TQFP package
BLOCK DIAGRAM
CLK0
VEE
75k
/CLK0
75k75k
VEE VCC
CLK1
VEE
75k
/CLK1
75k75k
VEE VCC
CLK_SEL
75k
VEE
0
1
VBB
Q0
/Q0
Q1
/Q1
Q2
/Q2
Q3
/Q3
Q4
/Q4
Q5
/Q5
Q6
/Q6
Q7
/Q7
Q8
/Q8
Q9
/Q9
DESCRIPTION
Precision Edge®
The SY100EP111U is a high-speed, low skew 1-to-10
differential fanout buffer designed for clock distribution in
new, high-performance systems. The internal 2:1 mux
allows the input to select between two differential clock
sources.
The device is specifically designed for low skew. The
interconnect scheme and metal layout are carefully
optimized for minimal gate-to-gate skew within the device.
Wafer characterization and process control ensure
consistent distribution of propagation delay from lot to lot.
The VBB output is intended for use as a reference
voltage for single-ended reception of ECL signals to that
device only. When using VBB for this purpose, it is
recommended that VBB is decoupled to VCC via a 0.01µF
capacitor.
Precision Edge is a registered trademark of Micrel, Inc.
M9999-021511
[email protected] or (408) 955-1690
1
Rev.: F Amendment: /0
Issue Date: December 2005

1 page




100EP111U pdf
Micrel, Inc.
Precision Edge®
SY100EP111U
LVECL DC ELECTRICAL CHARACTERISTICS(1)
VEE = –2.375V to –3.8V; VCC = 0V
Symbol
Parameter
TA = –40°C
TA = +25°C
Min. Typ. Max. Min. Typ. Max.
TA = +85°C
Min. Typ. Max. Unit Condition
VIL Input LOW Voltage
(Single-ended)
–1945 — –1625 –1945 — –1625 –1945 — –1625 mV
VIH Input HIGH Voltage
(Single-ended)
–1165 — –0880 –1165 — –0880 –1165 — –0880 mV
VOL
VOH
VBB
VIHCMR
Output LOW Voltage
–1945 –1820 –1695 –1945 –1820 –1695 –1945 –1820 –1695
Output HIGH Voltage
–1145 –1020 –0895 –1145 –1020 –0895 –1145 –1020 –0895
Output Reference Voltage(2) –1525 –1425 –1325 –1525 –1425 –1325 –1525 –1425 –1325
Input HIGH Voltage
Common Mode Range(3)
VEE +1.2
0.0 VEE +1.2
0.0 VEE +1.2
0.0
mV 50to VCC–2V
mV 50to VCC–2V
mV
V
Note 1.
Note 2.
Note 3.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
Single-ended input operation is limited VEE –3.0V in LVECL mode.
VIHCMR (min) varies 1:1 with VEE. The VIHCMR range is referenced to the most positive side of the differential input signal.
HSTL DC ELECTRICAL CHARACTERISTICS
VCC = 2.375V to 3.8V; VEE = 0V
Symbol
Parameter
TA = –40°C
Min. Typ. Max.
VIH Input HIGH Voltage
VIL Input LOW Voltage
VX Input Crossover Voltage
1200
680
400
900
TA = +25°C
Min. Typ. Max.
1200 —
— — 400
680 — 900
TA = +85°C
Min. Typ. Max.
1200 —
— — 400
680 — 900
Unit
mV
mV
mV
M9999-021511
[email protected] or (408) 955-1690
5

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