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Número de pieza | STA350BW | |
Descripción | 2.1-channel high-efficiency digital audio system | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
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Sound Terminal®
2.1-channel high-efficiency digital audio system
Datasheet − production data
Features
■ Wide-range supply voltage
– 5 V to 26 V (operating range)
– 30 V (absolute maximum rating)
■ Four power output configurations(a)
– 2 channels of ternary PWM (stereo mode)
(2 x 50 W into 6 Ω at 25 V)
– 3 channels - left, right using binary and LFE
using ternary PWM (2.1 mode) (2 x 18 W +
1 x 40 W into 2 x 4 Ω, 1 x 8 Ω at 25 V)
– 2 channels of ternary PWM (2 x 50 W) +
stereo lineout ternary
– 1 channel of ternary PWM as mono-BTL
(1 x 90 W into 3 Ω at 24.5 V)
■ FFX™ 100 dB SNR and dynamic range
■ Selectable 32 to 192 kHz input sample rates
■ I2C control with selectable device address
■ Digital gain/attenuation +42 dB to -80 dB with
0.125 dB/step resolution
■ Soft-volume update with programmable ratio
■ Individual channel and master gain/attenuation
■ Two independent DRCs configurable as a
dual-band anti-clipper (B2DRC) or independent
limiters/compressors
■ EQ-DRC for DRC based on filtered signals
■ Dedicated LFE processing for bass boosting
with 0.125 dB/step resolution
■ Audio presets:
– 15 preset crossover filters
– 5 preset anti-clipping modes
– Preset nighttime listening mode
■ Individual channel and master soft/hard mute
■ Independent channel volume and DSP bypass
PowerSSO-36
with exposed pad down (EPD)
■ Automatic zero-detect mute
■ Automatic invalid input-detect mute
■ I2S input data interface
■ Input and output channel mapping
■ Up to 8 user-programmable biquads per
channel
■ 3 coefficient banks for EQ presets storing with
fast recall via I2C interface
■ Extended coefficient dynamic up to -4..4 for
easy implementation of high shelf filters
■ Bass/treble tones and de-emphasis control
■ Selectable high-pass filter for DC blocking
■ Advanced AM interference frequency
switching and noise suppression modes
■ Selectable high or low bandwidth
noise-shaping topologies
■ Selectable clock input ratio
■ 96 kHz internal processing sample rate with
quantization error noise shaping for very low
cutoff frequency filters
■ Thermal overload and short-circuit protection
embedded
■ Video apps: 576 x Fs input mode supported
■ Fully compatible with STA339BW and
STA339BWS
a. Music output power with THD = 10%, using ST’s recommended board, see Section 4:
Characterization curves for more details.
April 2012
This is information on a product in full production.
Doc ID 018572 Rev 3
1/86
www.st.com
1
1 page STA350BW
Contents
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.11.6 Limiter 1 extended release threshold (addr 0x33) . . . . . . . . . . . . . . . . . 61
7.11.7 Limiter 2 extended attack threshold (addr 0x34 . . . . . . . . . . . . . . . . . . ) 62
7.11.8 Limiter 2 extended release threshold (addr 0x35) . . . . . . . . . . . . . . . . . 62
User-defined coefficient control registers (addr 0x16 - 0x26) . . . . . . . . . . 62
7.12.1 Coefficient address register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
7.12.2 Coefficient b1 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 62
7.12.3 Coefficient b1 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
7.12.4 Coefficient b1 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
7.12.5 Coefficient b2 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 63
7.12.6 Coefficient b2 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
7.12.7 Coefficient b2 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
7.12.8 Coefficient a1 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 63
7.12.9 Coefficient a1 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
7.12.10 Coefficient a1 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
7.12.11 Coefficient a2 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 63
7.12.12 Coefficient a2 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
7.12.13 Coefficient a2 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
7.12.14 Coefficient b0 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 64
7.12.15 Coefficient b0 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
7.12.16 Coefficient b0 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
7.12.17 Coefficient write/read control register . . . . . . . . . . . . . . . . . . . . . . . . . . 64
7.12.18 User-defined EQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
7.12.19 Pre-scale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
7.12.20 Post-scale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
7.12.21 Overcurrent post-scale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Variable max power correction registers (addr 0x27 - 0x28) . . . . . . . . . . 69
Variable distortion compensation registers (addr 0x29 - 0x2A) . . . . . . . . 69
Fault detect recovery constant registers (addr 0x2B - 0x2C) . . . . . . . . . . 70
Device status register (addr 0x2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
EQ coefficients and DRC configuration register (addr 0x31) . . . . . . . . . . 71
Extended configuration register (addr 0x36) . . . . . . . . . . . . . . . . . . . . . . 72
7.18.1 Dual-band DRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
7.18.2 EQ DRC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
7.18.3 Extended post-scale range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
7.18.4 Extended attack rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
7.18.5 Extended BIQUAD selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Doc ID 018572 Rev 3
5/86
5 Page STA350BW
1.1 Block diagram
Figure 1. Block diagram
2
IS
in terfa ce
I2C
Vo lu me
c ontr ol
FFX
Pow er
co ntro l
PLL
D ig ita l DSP
Description
Pro tection
curre nt/the rm al
C han nel
1A
Log ic
C hann el
1B
R egulat ors
Bias
Ch anne l
2A
C hann el
2B
Po w er
AM045167v1
Doc ID 018572 Rev 3
11/86
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet STA350BW.PDF ] |
Número de pieza | Descripción | Fabricantes |
STA350BW | 2.1-channel high-efficiency digital audio system | STMicroelectronics |
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