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Número de pieza | 1EDI20I12MF | |
Descripción | Single Channel IGBT Gate Driver IC | |
Fabricantes | Infineon | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 1EDI20I12MF (archivo pdf) en la parte inferior de esta página. Total 22 Páginas | ||
No Preview Available ! 1EDI EiceDRIVER™ Compact
Output with Clamp variant for IGBT
Single Channel IGBT Gate Driver IC
1EDI10I12MF
1EDI20I12MF
1EDI30I12MF
Data Sheet
Rev. 2.0, 2014-11-10
Industrial Power Control
1 page 1EDI EiceDRIVER™ Compact
1EDIxxI12MF
List of Figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Block Diagram 1EDI10I12MF, 1EDI20I12MF and 1EDI30I12MF. . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PG-DSO-8-51 (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
UVLO Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PG-DSO-8-51 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Reference Layout for Thermal Data (Copper thickness 35 μm) . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Data Sheet
5 Rev. 2.0, 2014-11-10
5 Page 1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Pin Configuration and Functionality
IN- Inverting Driver Input
IN- inverted control signal for driver output if IN+ is set to high. (Output sourcing active at IN- = low and IN+ = high)
Due to internal filtering a minimum pulse width is defined to ensure robustness against noise at IN-. An internal
weak pull-up-resistor favors off-state.
GND1
Ground connection of input circuit.
VCC2
Positive power supply pin of output driving circuit. A proper blocking capacitor has to be placed close to this supply
pin.
OUT Driver Output
Combined source and sink output pin to external IGBT. The output voltage will be switched between VCC2 and
GND2 and is controlled by IN+ and IN-. In case of an UVLO event this output will be switched off and an active
shut down keeps the output voltage at a low level.
CLAMP Active Miller Clamp
Connect gate of external IGBT directly to this pin. As soon as the gate voltage has dropped below 2 V referred to
GND2 during turn off state the CLAMP function ties its output to GND2 to avoid parasitic turn on of the connected
IGBT.
GND2 Reference Ground
Reference ground of the output driving circuit.
Data Sheet
11 Rev. 2.0, 2014-11-10
11 Page |
Páginas | Total 22 Páginas | |
PDF Descargar | [ Datasheet 1EDI20I12MF.PDF ] |
Número de pieza | Descripción | Fabricantes |
1EDI20I12MF | Single Channel IGBT Gate Driver IC | Infineon |
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