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Número de pieza IPAN65R650CE
Descripción MOSFET ( Transistor )
Fabricantes Infineon 
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No Preview Available ! IPAN65R650CE Hoja de datos, Descripción, Manual

IPAN65R650CE
MOSFET
650VCoolMOSªCEPowerTransistor
CoolMOS™isarevolutionarytechnologyforhighvoltagepower
MOSFETs,designedaccordingtothesuperjunction(SJ)principleand
pioneeredbyInfineonTechnologies.CoolMOS™CEisa
price-performanceoptimizedplatformenablingtotargetcostsensitive
applicationsinConsumerandLightingmarketsbystillmeetinghighest
efficiencystandards.Thenewseriesprovidesallbenefitsofafast
switchingSuperjunctionMOSFETwhilenotsacrificingeaseofuseand
offeringthebestcostdownperformanceratioavailableonthemarket.
Features
•ExtremelylowlossesduetoverylowFOMRdson*QgandEoss
•Veryhighcommutationruggedness
•Easytouse/drive
•Pb-freeplating,Halogenfreemoldcompound
•Qualifiedforstandardgradeapplications
Applications
PFCstages,hardswitchingPWMstagesandresonantswitchingstages
fore.g.PCSilverbox,Adapter,LCD&PDPTVandindoorlighting.
Pleasenote:ForMOSFETparallelingtheuseofferritebeadsonthegate
orseparatetotempolesisgenerallyrecommended.
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS @ Tj,max
700
V
RDS(on),max
650
m
ID. 10.1 A
Qg.typ
23
nC
ID,pulse
18
A
Eoss@400V
2
µJ
Type/OrderingCode
IPAN65R650CE
Package
PG-TO 220 FullPAK -
Narrow Lead
Marking
65S650CE
PG-TO220FP
Drain
Pin 2, Tab
Gate
Pin 1
Source
Pin 3
RelatedLinks
see Appendix A
Final Data Sheet
1 Rev.2.0,2016-04-27

1 page




IPAN65R650CE pdf
650VCoolMOSªCEPowerTransistor
IPAN65R650CE
3Electricalcharacteristics
atTj=25°C,unlessotherwisespecified
Table5Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
V(BR)DSS
V(GS)th
IDSS
IGSS
RDS(on)
RG
Table6Dynamiccharacteristics
Parameter
Symbol
Input capacitance
Output capacitance
Effective output capacitance,
energy related1)
Effective output capacitance,
time related2)
Turn-on delay time
Ciss
Coss
Co(er)
Co(tr)
td(on)
Rise time
tr
Turn-off delay time
td(off)
Fall time
tf
Table7Gatechargecharacteristics
Parameter
Symbol
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
Qgs
Qgd
Qg
Vplateau
Min.
650
2.5
-
-
-
-
-
-
Values
Typ. Max.
--
3.0 3.5
-1
10 -
- 100
0.54 0.65
1.40 -
10.5 -
Unit Note/TestCondition
V VGS=0V,ID=1mA
V VDS=VGS,ID=0.21mA
µA
VDS=650,VGS=0V,Tj=25°C
VDS=650,VGS=0V,Tj=150°C
nA VGS=20V,VDS=0V
VGS=10V,ID=2.1A,Tj=25°C
VGS=10V,ID=2.1A,Tj=150°C
f=1MHz,opendrain
Min.
-
-
-
Values
Typ. Max.
440 -
30 -
21 -
Unit Note/TestCondition
pF VGS=0V,VDS=100V,f=1MHz
pF VGS=0V,VDS=100V,f=1MHz
pF VGS=0V,VDS=0...480V
- 88 - pF ID=constant,VGS=0V,VDS=0...480V
-
10 -
ns
VDD=400V,VGS=13V,ID=3.2A,
RG=6.8;seetable10
-
8-
ns
VDD=400V,VGS=13V,ID=3.2A,
RG=6.8;seetable10
-
64 -
ns
VDD=400V,VGS=13V,ID=3.2A,
RG=6.8;seetable10
-
11 -
ns
VDD=400V,VGS=13V,ID=3.2A,
RG=6.8;seetable10
Min.
-
-
-
-
Values
Typ. Max.
2.75 -
12 -
23 -
5.5 -
Unit Note/TestCondition
nC VDD=480V,ID=3.2A,VGS=0to10V
nC VDD=480V,ID=3.2A,VGS=0to10V
nC VDD=480V,ID=3.2A,VGS=0to10V
V VDD=480V,ID=3.2A,VGS=0to10V
1)Co(er)isafixedcapacitancethatgivesthesamestoredenergyasCosswhileVDSisrisingfrom0to80%Vo(BR)DSS
2)Co(tr)isafixedcapacitancethatgivesthesamestoredenergyasCosswhileVDSisrisingfrom0to80%Vo(BR)DSS
Final Data Sheet
5 Rev.2.0,2016-04-27

5 Page





IPAN65R650CE arduino
650VCoolMOSªCEPowerTransistor
IPAN65R650CE
5TestCircuits
Table9Diodecharacteristics
Test circuit for diode characteristics
Rg1
VDS
Rg 2
IF
Rg1 = Rg 2
Diode recovery waveform
V,I
VDS( peak)
VDS
IF
dIF / dt
Irrm
VDS
trr
tF tS
IF t
QF QS
10 %Irrm
dIrr / dt Qtrrrr ==tFQ+F t+S QS
Table10Switchingtimes
Switching times test circuit for inductive load
VGS
VDS
VDS
VGS
Switching times waveform
90%
10%
td(on) tr
ton
td(off) tf
toff
Table11Unclampedinductiveload
Unclamped inductive load test circuit
ID VDS
Unclamped inductive waveform
V(BR)DS
VDS
ID
VDS
Final Data Sheet
11 Rev.2.0,2016-04-27

11 Page







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