DataSheet39.com

What is GS82583EQ36GK?

This electronic component, produced by the manufacturer "GSI Technology", performs the same function as "288Mb SigmaQuad-IIIe Burst of 2 SRAM".


GS82583EQ36GK Datasheet PDF - GSI Technology

Part Number GS82583EQ36GK
Description 288Mb SigmaQuad-IIIe Burst of 2 SRAM
Manufacturers GSI Technology 
Logo GSI Technology Logo 


There is a preview and GS82583EQ36GK download ( pdf file ) link at the bottom of this page.





Total 26 Pages



Preview 1 page

No Preview Available ! GS82583EQ36GK datasheet, circuit

GS82583EQ18/36GK-500/450/400
260-Pin BGA
Commercial Temp
Industrial Temp
288Mb SigmaQuad-IIIe™
Burst of 2 SRAM
Up to 500 MHz
1.3V VDD
1.2V, 1.3V, or 1.5V VDDQ
Features
• 8Mb x 36 and 16Mb x 18 organizations available
• 500 MHz maximum operating frequency
• 1.0 BT/s peak transaction rate (in billions per second)
• 72 Gb/s peak data bandwidth (in x36 devices)
• Separate I/O DDR Data Buses
• Non-multiplexed DDR Address Bus
• Two operations - Read and Write - per clock cycle
• Burst of 2 Read and Write operations
• 3 cycle Read Latency
• 1.3V nominal core voltage
• 1.2V, 1.3V, or 1.5V HSTL I/O interface
• Configurable ODT (on-die termination)
• ZQ pin for programmable driver impedance
• ZT pin for programmable ODT impedance
• IEEE 1149.1 JTAG-compliant Boundary Scan
• 260-pin, 14 mm x 22 mm, 1 mm ball pitch, 6/6 RoHS-
compliant BGA package
SigmaQuad-IIIeFamily Overview
SigmaQuad-IIIe SRAMs are the Separate I/O half of the
SigmaQuad-IIIe/SigmaDDR-IIIe family of high performance
SRAMs. Although very similar to GSI's second generation of
networking SRAMs (the SigmaQuad-II/SigmaDDR-II family),
these third generation devices offer several new features that
help enable significantly higher performance.
Clocking and Addressing Schemes
The GS82583EQ18/36GK SigmaQuad-IIIe SRAMs are
synchronous devices. They employ three pairs of positive and
negative input clocks; one pair of master clocks, CK and CK,
and two pairs of write data clocks, KD[1:0] and KD[1:0]. All
six input clocks are single-ended; that is, each is received by a
dedicated input buffer.
CK and CK are used to latch address and control inputs, and to
control all output timing. KD[1:0] and KD[1:0] are used solely
to latch data inputs.
Each internal read and write operation in a SigmaQuad-IIIe B2
SRAM is two times wider than the device I/O bus. An input
data bus de-multiplexer is used to accumulate incoming data
before it is simultaneously written to the memory array. An
output data multiplexer is used to capture the data produced
from a single memory array read and then route it to the
appropriate output drivers as needed. Therefore, the address
field of a SigmaQuad-IIIe B2 SRAM is always one address pin
less than the advertised index depth (e.g. the 16M x 18 has 8M
addressable index).
Speed Grade
-500
-450
-400
Parameter Synopsis
Max Operating Frequency
500 MHz
450 MHz
400 MHz
Read Latency
3 cycles
3 cycles
3 cycles
VDD
1.25V to 1.35V
1.25V to 1.35V
1.25V to 1.35V
Rev: 1.05 8/2016
1/26
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2014, GSI Technology

line_dark_gray
GS82583EQ36GK equivalent
GS82583EQ18/36GK-500/450/400
Symbol
MVQ
VDD
VDDQ
VREF
VSS
TCK
TMS
TDI
TDO
MCH
MCL
NC
NUI
NUO
Description
I/O Voltage Select — Indicates what voltage is supplied to the VDDQ pins. Must be tied High or Low.
MVQ = 0: Configure for 1.2V or 1.3V nominal VDDQ.
MVQ = 1: Configure for 1.5V nominal VDDQ.
Core Power Supply
I/O Power Supply
Input Reference Voltage — Input buffer reference voltage.
Ground
JTAG Clock — Weakly pulled Low internally.
JTAG Mode Select — Weakly pulled High internally.
JTAG Data Input — Weakly pulled High internally.
JTAG Data Output
Must Connect High — May be tied to VDDQ directly or via a 1kresistor.
Must Connect Low — May be tied to VSS directly or via a 1kresistor.
No Connect — There is no internal chip connection to these pins. They may be left unconnected, or tied/
driven High or Low.
Not Used Input — There is an internal chip connection to these input pins, but they are unused by the
device. They are pulled Low internally. They may be left unconnected or tied/driven Low. They should not be
tied/driven High.
Not Used Output — There is an internal chip connection to these output pins, but they are unused by the
device. The drivers are tri-stated internally. They should be left unconnected.
Type
Input
Input
Input
Input
Output
Input
Input
Input
Output
Rev: 1.05 8/2016
5/26
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2014, GSI Technology


line_dark_gray

Preview 5 Page


Part Details

On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for GS82583EQ36GK electronic component.


Information Total 26 Pages
Link URL [ Copy URL to Clipboard ]
Download [ GS82583EQ36GK.PDF Datasheet ]

Share Link :

Electronic Components Distributor


An electronic components distributor is a company that sources, stocks, and sells electronic components to manufacturers, engineers, and hobbyists.


SparkFun Electronics Allied Electronics DigiKey Electronics Arrow Electronics
Mouser Electronics Adafruit Newark Chip One Stop


Featured Datasheets

Part NumberDescriptionMFRS
GS82583EQ36GKThe function is 288Mb SigmaQuad-IIIe Burst of 2 SRAM. GSI TechnologyGSI Technology

Semiconductors commonly used in industry:

1N4148   |   BAW56   |   1N5400   |   NE555   |  

LM324   |   BC327   |   IRF840  |   2N3904   |  



Quick jump to:

GS82     1N4     2N2     2SA     2SC     74H     BC     HCF     IRF     KA    

LA     LM     MC     NE     ST     STK     TDA     TL     UA    



Privacy Policy   |    Contact Us     |    New    |    Search