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PDF GS9076 Data sheet ( Hoja de datos )

Número de pieza GS9076
Descripción SD-SDI Automatic Reclocker
Fabricantes Gennum 
Logotipo Gennum Logotipo



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No Preview Available ! GS9076 Hoja de datos, Descripción, Manual

Features
• SMPTE 259M-C compliant
• Automatic lock to SDI and DVB-ASI at 270Mb/s
• 4:1 input multiplexer patented technology
• Choice of dual reclocked data outputs or one data
output and one recovered clock output
• Loss of Signal (LOS) Output
• Lock Detect Output
• On-chip Input and Output Termination
• Differential 50Ω inputs and outputs
• Mute, Bypass and Autobypass functions
• Footprint and drop-in compatible with existing
GS2975A designs
• Pb-free and RoHS Compliant
• Single 3.3V power supply
• Operating temperature range: 0°C to 70°C
Applications
• SMPTE 259M-C Serial Digital Interfaces
GS9076 HD-LINX® III
SD-SDI Automatic Reclocker
with Dual Differential Outputs
GS9076 Data Sheet
Description
The GS9076 is an SD-SDI Serial Digital Reclocker
designed to automatically recover the embedded clock
from a digital video signal and re-time the incoming
video data. The device automatically detects and locks
to incoming SMPTE 259M-C SDI and DVB-ASI signals
at 270Mb/s.
The GS9076 removes the high frequency jitter
components from the bit-serial stream. Input
termination is on-chip for seamless matching to 50Ω
transmission lines. The device requires only one
external crystal to set the VCO frequency when not
locked and provides adjustment free operation.
In systems which require passing of non-SMPTE data
rates, the GS9076 can be configured to either
automatically or manually enter a bypass mode in order
to pass the signal without reclocking.
The GS9076 offers a choice of dual reclocked data
outputs or one data output and one recovered clock
output. The device is footprint and drop-in compatible
with existing GS2975A designs, with no additional
application changes required.
The GS9076 is Pb-free, and the encapsulation
compound does not contain halogenated flame
retardant.
This component and all homogeneous sub-components
are RoHS compliant.
44617 - 1 January 2008
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www.gennum.com

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GS9076 pdf
1.2 GS9076 Pin Descriptions
GS9076 Data Sheet
Table 1-1: Pin Descriptions
Pin Number Name
1, 3 DDI0, DDI0
2 DDI0_VTT
4, 8, 12,16, 32, GND
43, 49
5, 7 DDI1,DDI1
6 DDI1_VTT
9, 11
DDI2, DDI2
10
13, 15
14
17, 18
DDI2_VTT
DDI3, DDI3
DDI3_VTT
DDI_SEL[1:0]
19 BYPASS
20 AUTOBYPASS
21 AUTO
22 VCC_VCO
23 VEE_VCO
24, 25, 26
SS[2:0]
27 NC
28 LOCKED
Type
Input
Passive
Passive
Input
Passive
Input
Passive
Input
Passive
Logic Input
Logic Input
Logic Input
Logic Input
Power
Power
Bi-directional
No Connect
Output
Description
Serial digital differential input 0.
Center tap of two 50Ω on-chip termination resistors between DDI0 and DDI0.
Recommended connect to GND.
Serial digital differential input 1.
Center tap of two 50Ω on-chip termination resistors between DDI1 and DDI1.
Serial digital differential input 2.
Center tap of two 50Ω on-chip termination resistors between DDI2 and DDI2.
Serial digital differential input 3.
Center tap of two 50Ω on-chip termination resistors between DDI3 and DDI3.
Serial digital input select.
DDI_SEL1
0
0
1
1
DDI_SEL0
0
1
0
1
INPUT SELECTED
DDI0
DDI1
DDI2
DDI3
Bypass the reclocker stage.
When BYPASS is HIGH, it overwrites the AUTOBYPASS setting.
Automatically bypasses the reclocker stage when the PLL is not locked
This pin is ignored when BYPASS is HIGH.
Auto select.
This pin should be set HIGH for automatic SD-SDI and DVB-ASI standard
detection.
Most positive power supply connection for the internal VCO section.
Connect to 3.3V.
Most negative power supply connection for the internal VCO section.
Connect to GND.
The SS[2:0] pins will display 010 when the internal PLL has locked to a 270Mb/s
input data rate.
Not connected internally.
Lock Detect.
This pin is set HIGH by the device when the PLL is locked.
44617 - 1 January 2008
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GS9076 arduino
GS9076 Data Sheet
VCC
VCC _ VSID
2
VSID
2
VDD
VCC _ VSID
2
+
VSID
2
VSID
2
0 VSID
_ VSID
2
Figure 2-1: Serial Digital Input Signal Swing
Single-Ended Swing (DDIx)
Single-Ended Swing (DDIx)
Differential Swing (DDIx-DDIx)
VCC
VCC _ VOD
2
VOD
2
Single-Ended Swing (DDO0, DDO1, RCO)
VDD
VCC _ VOD
2
+
VOD
2
VOD
2
Single-Ended Swing (DDO0,DDO1, RCO)
0
_ VOD
2
VOD
Differential Swing (DDO0-DDO0)
(DDO1-DDO1)
(RCO-RCO)
Figure 2-2: Serial Digital Output Signal Swing
44617 - 1 January 2008
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