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PDF UT54ACTS10 Data sheet ( Hoja de datos )
| Número de pieza | UT54ACTS10 | |
| Descripción | Triple 3-Input NAND Gates | |
| Fabricantes | Aeroflex Circuit Technology | |
| Logotipo |  |
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Standard Products
UT54ACS10/UT54ACTS10
Triple 3-Input NAND Gates
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
1.2μ CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 14-pin DIP
- 14-lead flatpack
UT54ACS10 - SMD 5962-96520
UT54ACTS10 - SMD 5962-96521
DESCRIPTION
The UT54ACS10 and the UT54ACTS10 are triple three-input
NAND gates. The circuits perform the Boolean functions
Y = A⋅B⋅C or Y = A + B + C in positive logic.
The devices are characterized over full military temperature
range of -55°C to +125°C.
FUNCTION TABLE
INPUTS
OUTPUT
ABCY
HHH L
L XXH
X L XH
XXLH
LOGIC SYMBOL
(1)
A1
(2)
B1
(13)
C1
(3)
A2
(4)
B2
(5)
C2
(9)
A3
(10)
B3
(11)
C3
&
(12) Y1
(6) Y2
(8)
Y3
Note:.
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and
IEC Publication 617-12.
PINOUTS
A1
B1
A2
B2
C2
Y2
VSS
14-Pin DIP
Top View
A1 1 14 VDD
B1 2 13 C1
A2 3 12 Y1
B2 4 11 C3
C2 5 10 B3
Y2 6
9 A3
VSS 7
8 Y3
14-Lead Flatpack
Top View
1 14
2 13
3 12
4 11
5 10
69
78
VDD
C1
Y1
C3
B3
A3
Y3
LOGIC DIAGRAM
A1
B1
C1
A2
B2
C2
A3
B3
C3
Y1
Y2
Y3
1
1 page  
AC ELECTRICAL CHARACTERISTICS 2
(VDD = 5.0V ±10%; VSS = 0V 1, -55°C < TC < +125°C); Unless otherwise noted, Tc is per the temperature range ordered.
SYMBOL
PARAMETER
MINIMUM
MAXIMUM
UNIT
tPHL Input to Yn
tPLH Input to Yn
1 16 ns
1 12 ns
Notes:
1. Maximum allowable relative shift equals 50mV.
2. All specifications valid for radiation dose ≤ 1E6 rads(Si).
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet UT54ACTS10.PDF ] | |
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