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PDF 74HCU04BQ-Q100 Data sheet ( Hoja de datos )
| Número de pieza | 74HCU04BQ-Q100 | |
| Descripción | Hex unbuffered inverter | |
| Fabricantes | NXP Semiconductors | |
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74HCU04-Q100
Hex unbuffered inverter
Rev. 2 — 22 October 2015
Product data sheet
1. General description
The 74HCU04-Q100 is a hex unbuffered inverter. Inputs include clamp diodes that enable
the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Complies with JEDEC standard JESD7A
Balanced propagation delays
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature
range
Name
Description
74HCU04D-Q100 40 C to +125 C SO14
plastic small outline package; 14 leads; body width
3.9 mm
74HCU04PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
74HCU04BQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
Version
SOT108-1
SOT402-1
SOT762-1
1 page  
NXP Semiconductors
74HCU04-Q100
Hex unbuffered inverter
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 7.
Symbol Parameter
Conditions
25 C
tpd
propagation delay
nA to nY; see Figure 6
VCC = 2.0 V; CL = 50 pF
VCC = 4.5 V; CL = 50 pF
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V; CL = 50 pF
tt transition time
see Figure 6
VCC = 2.0 V; CL = 50 pF
VCC = 4.5 V; CL = 50 pF
VCC = 6.0 V; CL = 50 pF
CPD power dissipation per inverter; VI = GND to VCC
capacitance
Typ
[1]
19
7
5
6
[2]
19
7
6
[3] 10
Max
70
14
-
12
75
15
13
-
40 C to
+85 C
Max
40 C to Unit
+125 C
Max
90 105 ns
18 21 ns
- - ns
15 18 ns
95 110 ns
19 22 ns
16 19 ns
pF
[1] tpd is the same as tPHL, tPLH.
[2] tt is the same as tTHL, tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
74HCU04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
5 of 16
5 Page 
NXP Semiconductors
74HCU04-Q100
Hex unbuffered inverter
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
y
Z
14
8
c
EA
X
HE v M A
pin 1 index
1
e
7
bp
wM
A2
A1
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
D (1) E (2)
e
5.1
4.9
4.5
4.3
0.65
HE
6.6
6.2
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT402-1
MO-153
L Lp Q v w y Z (1) θ
1
0.75 0.4
0.50 0.3
0.2 0.13
0.1
0.72
0.38
8o
0o
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
Fig 18. Package outline SOT402-1 (TSSOP14)
74HCU04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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