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What is ADV3224?

This electronic component, produced by the manufacturer "Analog Devices", performs the same function as "16 x 8 Analog Crosspoint Switch".


ADV3224 Datasheet PDF - Analog Devices

Part Number ADV3224
Description 16 x 8 Analog Crosspoint Switch
Manufacturers Analog Devices 
Logo Analog Devices Logo 


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Data Sheet
FEATURES
16 × 8 high speed, nonblocking switch array
Pinout and functionally equivalent to the AD8110/AD8111
Drop-in compatible with the ADV3228/ADV3229 8 × 8 array
Complete solution
Buffered inputs
Programmable high impedance outputs
8 output amplifiers, G = +1 (ADV3224), G = +2 (ADV3225)
Drives 150 Ω loads
Operates on ±5 V supplies
Low power: 0.5 W
Excellent ac performance
−3 dB bandwidth
200 mV p-p: 1200 MHz (ADV3224), 900 MHz (ADV3225)
2 V p-p: 750 MHz (ADV3224), 850 MHz (ADV3225)
0.5 dB flatness (2 V p-p)
250 MHz (ADV3224), 235 MHz (ADV3225)
Slew rate: 2500 V/μs
Serial or parallel programming of switch array
72-lead LFCSP (10 mm × 10 mm)
APPLICATIONS
Routing of high speed signals including
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed video (MPEG, wavelet)
3-level digital video (HDB3)
Data communications
Telecommunications
GENERAL DESCRIPTION
The ADV3224/ADV3225 are high speed 16 × 8 analog crosspoint
switch matrices. They offer a −3 dB signal bandwidth of greater
than 750 MHz and a high slew rate of greater than 2500 V/μs.
The ADV3224/ADV3225 include eight independent output
buffers that can be placed into a high impedance state for
paralleling crosspoint outputs to prevent off channels from
loading the output bus. The ADV3224 has a gain of +1 and the
ADV3225 has a gain of +2, and they both operate on voltage
750 MHz, 16 × 8
Analog Crosspoint Switch
ADV3224/ADV3225
CLK
DATAIN
UPDATE
CE
RESET
FUNCTIONAL BLOCK DIAGRAM
SER/PAR D0 D1 D2 D3 D4
A0
A1
A2
40-BIT SHIFT REGISTER
WITH 4-BIT
PARALLEL LOADING
DATAOUT
40
PARALLEL LATCH
40
DECODE
8 × 5:16 DECODERS
SET INDIVIDUAL
OR RESET ALL
OUTPUTS TO OFF
8
ADV3224/
ADV3225
OUTPUT
128
BUFFER
G = +1,
G = +2
SWITCH
MATRIX
Figure 1.
supplies of ±5 V. Channel switching is performed via a serial
digital control that can accommodate the daisy chaining of
several devices or via a parallel control to allow updating of an
individual output without reprogramming the entire array.
The ADV3224/ADV3225 are available in the 72-lead LFCSP
package over the extended industrial temperature range of
−40°C to +85°C.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2010–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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ADV3224 equivalent
Data Sheet
TIMING CHARACTERISTICS (SERIAL)
Table 2.
Parameter
Serial Data Setup Time
CLK Pulse Width
Serial Data Hold Time
CLK Pulse Separation, Serial Mode
CLK to UPDATE Delay
UPDATE Pulse Width
CLK to DATAOUT Valid, Serial Mode
Propagation Delay, UPDATE to Switch On or Off
Data Load Time, CLK = 5 MHz, Serial Mode
CLK, UPDATE Rise and Fall Times
RESET Time
Timing Diagram—Serial Mode
1
CLK
0
t2
t1 t3
1
DATAIN
0
OUT07 (D4)
1 = LATCHED
UPDATE
0 = TRANSPARENT
t7
DATAOUT
ADV3224/ADV3225
Symbol
t1
t2
t3
t4
t5
t6
t7
Min Typ Max
10
10
10
10
10
10
50
20
8
50
30
t4
LOAD DATA INTO
SERIAL REGISTER
ON FALLING EDGE
OUT07 (D3)
OUT00 (D0)
t5 t6
TRANSFER DATA FROM SERIAL
REGISTER TO PARALLEL
LATCHES DURING LOW LEVEL
Figure 2. Timing Diagram, Serial Mode
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
LOGIC LEVELS
Table 3. Logic Levels
VIH VIL
RESET, SER/PAR,
CLK, DATAIN,
CE, UPDATE
RESET, SER/PAR,
CLK, DATAIN,
CE, UPDATE
2.0 V min
0.8 V max
VOH
DATAOUT
2.4 V min
VOL
DATAOUT
0.4 V max
IIH
SER/PAR,
CLK, DATAIN,
CE, UPDATE
2 µA max
IIL
SER/PAR, CLK,
DATAIN, CE,
UPDATE
2 µA max
IIH
RESET
2 µA max
IIL
RESET
300 µA max
IOH
DATAOUT
3 mA min
IOL
DATAOUT
1 mA min
Rev. B | Page 5 of 24


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