74HCT4051 Datasheet PDF - NXP Semiconductors
Part Number | 74HCT4051 | |
Description | 8-channel analog multiplexer/demultiplexer | |
Manufacturers | NXP Semiconductors | |
Logo | ||
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8-channel analog multiplexer/demultiplexer
Rev. 8 — 5 February 2016
Product data sheet
1. General description
The 74HC4051; 74HCT4051 is a single-pole octal-throw analog switch (SP8T) suitable for
use in analog or digital 8:1 multiplexer/demultiplexer applications. The switch features
three digital select inputs (S0, S1 and S2), eight independent inputs/outputs (Yn), a
common input/output (Z) and a digital enable input (E). When E is HIGH, the switches are
turned off. Inputs include clamp diodes. This enables the use of current limiting resistors
to interface inputs to voltages in excess of VCC.
2. Features and benefits
Wide analog input voltage range from 5 V to +5 V
Complies with JEDEC standard no. 7A
Low ON resistance:
80 (typical) at VCC VEE = 4.5 V
70 (typical) at VCC VEE = 6.0 V
60 (typical) at VCC VEE = 9.0 V
Logic level translation: to enable 5 V logic to communicate with 5 V analog signals
Typical ‘break before make’ built-in
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
3. Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
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NXP Semiconductors
74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
7. Functional description
7.1 Function table
Table 3. Function table[1]
Input
Channel ON
E S2 S1 S0
L L L L Y0 to Z
L L L H Y1 to Z
L L H L Y2 to Z
L L H H Y3 to Z
L H L L Y4 to Z
L H L H Y5 to Z
L H H L Y6 to Z
L H H H Y7 to Z
H X X X switches off
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol
Parameter
Conditions
Min Max Unit
VCC supply voltage
[1] 0.5
+11.0 V
IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V
- 20 mA
ISK switch clamping current VSW < 0.5 V or VSW > VCC + 0.5 V
- 20 mA
ISW switch current
0.5 V < VSW < VCC + 0.5 V
- 25 mA
IEE supply current
- 20 mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
SO16, (T)SSOP16, and
DHVQFN16 package
-
-
65
[2] -
50
50
+150
500
mA
mA
C
mW
P
power dissipation
per switch
- 100 mW
[1] To avoid drawing VCC current out of terminal Z, when switch current flows into terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn, and in this case
there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE.
[2] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
74HC_HCT4051
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 5 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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